Hi Julien,
> On 28 Feb 2022, at 13:35, Julien Grall <jul...@xen.org> wrote:
>
> From: Julien Grall <jgr...@amazon.com>
>
> Since commit 54c4ae18d158 ("xen/arm32: head: Rework and document
> launch()"), the boot code is setting r12 but not read it.
>
> So remove the two instructions setting r12 and update the documentation
> to show r12 has no specific purpose.
>
> Signed-off-by: Julien Grall <jgr...@amazon.com>
Reviewed-by: Bertrand Marquis <bertrand.marq...@arm.com>
Cheers
Bertrand
>
> ---
> Changes in v2:
> - Don't set r12.
> ---
> xen/arch/arm/arm32/head.S | 6 +-----
> 1 file changed, 1 insertion(+), 5 deletions(-)
>
> diff --git a/xen/arch/arm/arm32/head.S b/xen/arch/arm/arm32/head.S
> index 13cfc837d39c..7a906167efca 100644
> --- a/xen/arch/arm/arm32/head.S
> +++ b/xen/arch/arm/arm32/head.S
> @@ -79,7 +79,7 @@
> * r9 - paddr(start)
> * r10 - phys offset
> * r11 - UART address
> - * r12 - is_secondary_cpu
> + * r12 -
> * r13 - SP
> * r14 - LR
> * r15 - PC
> @@ -166,8 +166,6 @@ past_zImage:
> #endif
> PRINT("- Boot CPU booting -\r\n")
>
> - mov r12, #0 /* r12 := is_secondary_cpu */
> -
> bl check_cpu_mode
> bl cpu_init
> bl create_page_tables
> @@ -206,8 +204,6 @@ GLOBAL(init_secondary)
> adr r9, start /* r9 := paddr (start) */
> sub r10, r9, r0 /* r10 := phys-offset */
>
> - mov r12, #1 /* r12 := is_secondary_cpu */
> -
> mrc CP32(r1, MPIDR)
> bic r7, r1, #(~MPIDR_HWID_MASK) /* Mask out flags to get CPU ID */
>
> --
> 2.32.0
>
>
