c/s 65e35549 "x86/PV: support data breakpoint extension registers"
accidentally broke the handing of writes. The call to activate_debugregs()
doesn't write %dr7 as v->arch.debugreg[7] hasn't been updated yet, and the
break skips the intended write to %dr7.
Remove the break, causing execution to hit the write_debugreg(7, value); in
context at the bottom of the hunk, which in turn causes hardware to be updated
appropriately.
Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
---
CC: Jan Beulich <jbeul...@suse.com>
---
xen/arch/x86/traps.c | 5 +----
1 file changed, 1 insertion(+), 4 deletions(-)
diff --git a/xen/arch/x86/traps.c b/xen/arch/x86/traps.c
index 37210da..4bed9de 100644
--- a/xen/arch/x86/traps.c
+++ b/xen/arch/x86/traps.c
@@ -2074,14 +2074,11 @@ long set_debugreg(struct vcpu *v, unsigned int reg,
unsigned long value)
/*
* If DR7 was previously clear then we need to load all other
* debug registers at this point as they were not restored during
- * context switch.
+ * context switch. Updating DR7 itself happens later.
*/
if ( (v == curr) &&
!(v->arch.debugreg[7] & DR7_ACTIVE_MASK) )
- {
activate_debugregs(v);
- break;
- }
}
if ( v == curr )
write_debugreg(7, value);
--
2.1.4
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