From: Michael Kelley <mikel...@microsoft.com> Sent: Friday, August 13, 2021 12:31 PM > To: Tianyu Lan <ltyker...@gmail.com>; KY Srinivasan <k...@microsoft.com>; > Haiyang Zhang <haiya...@microsoft.com>; > Stephen Hemminger <sthem...@microsoft.com>; wei....@kernel.org; Dexuan Cui > <de...@microsoft.com>; > t...@linutronix.de; mi...@redhat.com; b...@alien8.de; x...@kernel.org; > h...@zytor.com; dave.han...@linux.intel.com; > l...@kernel.org; pet...@infradead.org; konrad.w...@oracle.com; > boris.ostrov...@oracle.com; jgr...@suse.com; > sstabell...@kernel.org; j...@8bytes.org; w...@kernel.org; > da...@davemloft.net; k...@kernel.org; j...@linux.ibm.com; > martin.peter...@oracle.com; a...@arndb.de; h...@lst.de; > m.szyprow...@samsung.com; robin.mur...@arm.com; > thomas.lenda...@amd.com; brijesh.si...@amd.com; a...@kernel.org; Tianyu Lan > <tianyu....@microsoft.com>; > pgo...@google.com; martin.b.ra...@gmail.com; a...@linux-foundation.org; > kirill.shute...@linux.intel.com; > r...@kernel.org; s...@canb.auug.org.au; saravan...@fb.com; > krish.sadhuk...@oracle.com; > aneesh.ku...@linux.ibm.com; xen-devel@lists.xenproject.org; > rient...@google.com; han...@cmpxchg.org; > t...@kernel.org > Cc: io...@lists.linux-foundation.org; linux-a...@vger.kernel.org; > linux-hyp...@vger.kernel.org; linux- > ker...@vger.kernel.org; linux-s...@vger.kernel.org; net...@vger.kernel.org; > vkuznets <vkuzn...@redhat.com>; > parri.and...@gmail.com; dave.han...@intel.com > Subject: RE: [PATCH V3 05/13] HV: Add Write/Read MSR registers via ghcb page > > From: Tianyu Lan <ltyker...@gmail.com> Sent: Monday, August 9, 2021 10:56 AM > > Subject: [PATCH V3 05/13] HV: Add Write/Read MSR registers via ghcb page > > See previous comments about tag in the Subject line. > > > Hyper-V provides GHCB protocol to write Synthetic Interrupt > > Controller MSR registers in Isolation VM with AMD SEV SNP > > and these registers are emulated by hypervisor directly. > > Hyper-V requires to write SINTx MSR registers twice. First > > writes MSR via GHCB page to communicate with hypervisor > > and then writes wrmsr instruction to talk with paravisor > > which runs in VMPL0. Guest OS ID MSR also needs to be set > > via GHCB. > > > > Signed-off-by: Tianyu Lan <tianyu....@microsoft.com> > > --- > > Change since v1: > > * Introduce sev_es_ghcb_hv_call_simple() and share code > > between SEV and Hyper-V code. > > --- > > arch/x86/hyperv/hv_init.c | 33 ++------- > > arch/x86/hyperv/ivm.c | 110 +++++++++++++++++++++++++++++ > > arch/x86/include/asm/mshyperv.h | 78 +++++++++++++++++++- > > arch/x86/include/asm/sev.h | 3 + > > arch/x86/kernel/cpu/mshyperv.c | 3 + > > arch/x86/kernel/sev-shared.c | 63 ++++++++++------- > > drivers/hv/hv.c | 121 ++++++++++++++++++++++---------- > > include/asm-generic/mshyperv.h | 12 +++- > > 8 files changed, 329 insertions(+), 94 deletions(-) > > > > diff --git a/arch/x86/hyperv/hv_init.c b/arch/x86/hyperv/hv_init.c > > index b3683083208a..ab0b33f621e7 100644 > > --- a/arch/x86/hyperv/hv_init.c > > +++ b/arch/x86/hyperv/hv_init.c > > @@ -423,7 +423,7 @@ void __init hyperv_init(void) > > goto clean_guest_os_id; > > > > if (hv_isolation_type_snp()) { > > - ms_hyperv.ghcb_base = alloc_percpu(void *); > > + ms_hyperv.ghcb_base = alloc_percpu(union hv_ghcb __percpu *); > > union hv_ghcb isn't defined. It is not added until patch 6 of the series. >
Ignore this comment. My mistake. Michael