On 02/20/2018 06:58 AM, Andrew Cooper wrote: > If the CPU pipeline supports RDTSCP or RDPID, a guest can observe the value in > MSR_TSC_AUX, irrespective of whether the relevant CPUID features are > advertised/hidden. > > At the moment, paravirt_ctxt_switch_to() only writes to MSR_TSC_AUX if > TSC_MODE_PVRDTSCP mode is enabled, but this is not the default mode. > Therefore, default PV guests can read the value from a previously scheduled > HVM vcpu, or TSC_MODE_PVRDTSCP-enabled PV guest. > > Alter the PV path to always write to MSR_TSC_AUX, using 0 in the common case. > > To amortise overhead cost, introduce wrmsr_tsc_aux() which performs a lazy > update of the MSR, and use this function consistently across the codebase. > > Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com> > --- > CC: Jan Beulich <jbeul...@suse.com> > CC: Jun Nakajima <jun.nakaj...@intel.com> > CC: Kevin Tian <kevin.t...@intel.com> > CC: Boris Ostrovsky <boris.ostrov...@oracle.com> > CC: Suravee Suthikulpanit <suravee.suthikulpa...@amd.com> > CC: Wei Liu <wei.l...@citrix.com> > CC: Roger Pau Monné <roger....@citrix.com> > CC: Konrad Rzeszutek Wilk <konrad.w...@oracle.com>
Reviewed-by: Boris Ostrovsky <boris.ostrov...@oracle.com> (Apologies for the delay. I am quite behind with my emails) _______________________________________________ Xen-devel mailing list Xen-devel@lists.xenproject.org https://lists.xenproject.org/mailman/listinfo/xen-devel
