From: Tom Lendacky <thomas.lenda...@amd.com>
The size for the Microcode Patch Block (MPB) for an AMD family 17h
processor is 3200 bytes. Add a #define for fam17h so that it does
not default to 2048 bytes and fail a microcode load/update.
Signed-off-by: Tom Lendacky <thomas.lenda...@amd.com>
Signed-off-by: Thomas Gleixner <t...@linutronix.de>
Reviewed-by: Borislav Petkov <b...@alien8.de>
Signed-off-by: Ingo Molnar <mi...@kernel.org>
[Linux commit f4e9b7af0cd58dd039a0fb2cd67d57cea4889abf]
Ported to Xen.
Signed-off-by: Andrew Cooper <andrew.coop...@citrix.com>
---
CC: Jan Beulich <jbeul...@suse.com>
---
xen/arch/x86/microcode_amd.c | 4 ++++
1 file changed, 4 insertions(+)
diff --git a/xen/arch/x86/microcode_amd.c b/xen/arch/x86/microcode_amd.c
index b54b0b9..53f9f54 100644
--- a/xen/arch/x86/microcode_amd.c
+++ b/xen/arch/x86/microcode_amd.c
@@ -107,6 +107,7 @@ static bool_t verify_patch_size(uint32_t patch_size)
#define F14H_MPB_MAX_SIZE 1824
#define F15H_MPB_MAX_SIZE 4096
#define F16H_MPB_MAX_SIZE 3458
+#define F17H_MPB_MAX_SIZE 3200
switch (boot_cpu_data.x86)
{
@@ -119,6 +120,9 @@ static bool_t verify_patch_size(uint32_t patch_size)
case 0x16:
max_size = F16H_MPB_MAX_SIZE;
break;
+ case 0x17:
+ max_size = F17H_MPB_MAX_SIZE;
+ break;
default:
max_size = F1XH_MPB_MAX_SIZE;
break;
--
2.1.4
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