On 21/02/17 17:25, Jan Beulich wrote:
>>>> On 20.02.17 at 12:00, <andrew.coop...@citrix.com> wrote:
>> The thermal/performance leaf was previously hidden from HVM guests, but fully
>> visible to PV guests.  Most of the leaf refers to MSR availability, and there
>> is nothing an unprivileged PV guest can do with the information, so hide the
>> leaf entirely.
>>
>> The PV MSR handling logic as minimal support for some thermal/perf operations
> ... has ...
>
>> from the hardware domain, so leak through the implemented subset of 
>> features.
> Does it make sense to continue to special case PV hwdom here?

Being able to play with these MSRs will be actively wrong for HVM
context.  It is already fairly wrong for PV context, as nothing prevents
you being rescheduled across pcpus while in the middle of a read/write
cycle on the MSRs.

> Should there perhaps be at least a fixme note?

One way or another, we have to invest some different mechanism of
providing real hardware details to the hardware domain which don't
collide with their vcpus.

~Andrew

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