On 24/01/17 14:16, Dario Faggioli wrote:
On Tue, 2017-01-24 at 13:49 +0000, Julien Grall wrote:
On 24/01/17 13:40, Dario Faggioli wrote:
Ah, wow... And how --forgive my naiveness-- do you measure / check
that?
I added a print in the interrupt path (gic_interrupt for ARM) to
dump
the interrupt number. This needs to be restrict to CPU2 and above to
avoid been flooded:
if ( smp_processor_id() > 1 )
printk("%s: CPU%u IRQ%u\n", __FUNCTION__, smp_processor_id(),
irq);
Ok.
I also added a print in the idle loop before and after the idling
instruction (wfi for ARM, pm_idle for x86 I think). You can see the
CPU
to go in idle mode but never coming back.
I see. Yes, this is very different on x86.
There, we have tracing (BTW, did that made it to ARM eventually?) and
there's TRC_PM_IDLE_ENTRY/EXIT which do pretty much the same of your
printk-s.
There is patch on the ML for xentrace support (see [1]) but nothing has
been upstreamed yet. Waiting for a new version from the contributor.
And if I look at it, I do see even totally idle (from the scheduler
point of view) pCPUs, I indeed see them going back and forth from and
to C3.
My knowledge on x86 is limited. When does a CPU decides to leave the
idle mode?
In the case of ARM, the wfi instruction will put the CPU in idle mode
until an interrupt is received.
Cheers,
[1]
https://lists.xenproject.org/archives/html/xen-devel/2016-04/msg00464.html
--
Julien Grall
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