>>> On 19.09.16 at 07:52, <suravee.suthikulpa...@amd.com> wrote: > Also, the AVIC hardware automatically synchronizes TPR and CR8/vTPR, when > values are updated. Therefore, xen does not need to handle this when enable > AVIC.
I'm having trouble matching this up with ... > --- a/xen/arch/x86/hvm/svm/vmcb.c > +++ b/xen/arch/x86/hvm/svm/vmcb.c > @@ -93,10 +93,14 @@ static int construct_vmcb(struct vcpu *v) > vmcb->_dr_intercepts = ~0u; > > /* Intercept all control-register accesses except for CR2 and CR8. */ > - vmcb->_cr_intercepts = ~(CR_INTERCEPT_CR2_READ | > + if ( !svm_avic_vcpu_enabled(v) ) > + vmcb->_cr_intercepts = ~(CR_INTERCEPT_CR2_READ | > CR_INTERCEPT_CR2_WRITE | > CR_INTERCEPT_CR8_READ | > CR_INTERCEPT_CR8_WRITE); > + else > + vmcb->_cr_intercepts = ~(CR_INTERCEPT_CR2_READ | > + CR_INTERCEPT_CR2_WRITE ); ... this change, enabling CR8 intercepts in AVIC mode. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
