>>> On 24.10.16 at 14:30, <eshel...@pobox.com> wrote:
> As best as I can tell, the current code already writes out the proper
> value for sizing ("pci_write_long(d, reg, ~0)" in the above code
> snippet).
No - for sizing a ROM BAR, only the address portion is supposed to
be written with all 1s as per the PCI spec. In particular it should be
quite clear that writing the enable bit with 1 is a bad thing when the
address portion is also written with all 1s.
I'd like to note though that as of commit d2bd05d88d ("xen-pciback:
return proper values during BAR sizing") the handling there is more
relaxed - previously writes of 0xFFFFFFFE were the only ones
considered to be sizing ones.
Jan
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