On September 06, 2016 9:21 PM, Jan Beulich <jbeul...@suse.com> wrote:
>>>> On 06.09.16 at 13:22, <xuqu...@huawei.com> wrote:
>> On September 06, 2016 5:05 PM, Jan Beulich <jbeul...@suse.com>
>>>>>> On 06.09.16 at 10:53, <xuqu...@huawei.com> wrote:
>>>> to be honest, my fix is also a tradeoff.. w/ my patch, multiple
>>>> pending pt interrupt instances may be combined as one injection of
>>>> guest timer interrupt..
>>>>  but as Yang said, It should be ok since it happens rarely and even
>>>> native OS will encounter the same problem if it disable the
>>>> interrupt for too
>>>long.
>>>
>>>And one OS may properly deal with that situation while another might
>>>not. For example, let me remind you of issues the hypervisor had in
>>>earlier days when no event/softirq processing happened for long
>>>enough, resulting in time management issues due to missed platform
>>>timer overflow handling. IOW an OS may avoid that situation by simply not
>disabling IRQs for too long a time.
>>>
>> Thanks for your reminding,
>> Jan, do you have any suggestion to fix this PT and apicv issue?
>> What do you think about Kevin's?
>
>Kevin's suggestion sounded reasonable, iirc, and I'd rely on his and your 
>better
>VMX knowledge for the low level details.
>

I'll try to verify Kevin's later.
Kevin is really a master but I am just a rookie. I always appreciate both of 
your education..

Quan

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