Hi Shannon,
On 16/08/2016 06:25, Shannon Zhao wrote:
From: Shannon Zhao <shannon.z...@linaro.org>
Factor MPIDR computing codes out as a helper, so it could be shared
between DT and ACPI.
Signed-off-by: Shannon Zhao <shannon.z...@linaro.org>
Acked-by: Julien Grall <julien.gr...@arm.com>
Regards,
---
tools/libxl/libxl_arm.c | 8 +-------
tools/libxl/libxl_arm.h | 11 +++++++++++
2 files changed, 12 insertions(+), 7 deletions(-)
diff --git a/tools/libxl/libxl_arm.c b/tools/libxl/libxl_arm.c
index 8c7fc09..fa0497c 100644
--- a/tools/libxl/libxl_arm.c
+++ b/tools/libxl/libxl_arm.c
@@ -309,13 +309,7 @@ static int make_cpus_node(libxl__gc *gc, void *fdt, int
nr_cpus,
for (i = 0; i < nr_cpus; i++) {
const char *name;
- /*
- * According to ARM CPUs bindings, the reg field should match
- * the MPIDR's affinity bits. We will use AFF0 and AFF1 when
- * constructing the reg value of the guest at the moment, for it
- * is enough for the current max vcpu number.
- */
- mpidr_aff = (i & 0x0f) | (((i >> 4) & 0xff) << 8);
+ mpidr_aff = libxl__compute_mpdir(i);
name = GCSPRINTF("cpu@%"PRIx64, mpidr_aff);
res = fdt_begin_node(fdt, name);
diff --git a/tools/libxl/libxl_arm.h b/tools/libxl/libxl_arm.h
index fe1c05f..5c8fbc6 100644
--- a/tools/libxl/libxl_arm.h
+++ b/tools/libxl/libxl_arm.h
@@ -35,6 +35,17 @@ static inline int libxl__prepare_acpi(libxl__gc *gc,
}
#endif
+static inline uint64_t libxl__compute_mpdir(unsigned int cpuid)
+{
+ /*
+ * According to ARM CPUs bindings, the reg field should match
+ * the MPIDR's affinity bits. We will use AFF0 and AFF1 when
+ * constructing the reg value of the guest at the moment, for it
+ * is enough for the current max vcpu number.
+ */
+ return (cpuid & 0x0f) | (((cpuid >> 4) & 0xff) << 8);
+}
+
/*
* Local variables:
* mode: C
--
Julien Grall
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