On Wed, 22 Jun 2016, Julien Grall wrote:
> Currently, Xen is reading the MIDR everytime it has to check whether
> the processor is affected by the erratum 766422.
> 
> This could take advantage of the new capability bitfields to detect
> whether the processor is affected at boot time.
> 
> With this patch, the number of instructions to check the erratum is
> going down from ~13 (including 2 loads and a co-processor access) to
> ~6 instructions (include 1 load).

The patch looks good but the midr bits were actually already stored in
cpu_data.  See:


> -/* Erratum 766422: only Cortex A15 r0p4 is affected */
> -#define cpu_has_erratum_766422()                             \
> -    (unlikely(current_cpu_data.midr.bits == 0x410fc0f4))

We weren't really accessing MIDR every time. Am I missing something?

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