Hi Quan,
On 17/06/16 09:51, Xu, Quan wrote:
+ arm/amd maintainers..
On June 01, 2016 5:05 PM, Xu, Quan <quan...@intel.com> wrote:
If Device-TLB flush timed out, we hide the target ATS device immediately and
crash the domain owning this ATS device. If impacted domain is hardware
domain, just throw out a warning.
By hiding the device, we make sure it can't be assigned to any domain any
longer (see device_assigned).
DomU (other than Dom0) gets crashed when a device IOTLB flush times out. I
suppose that's what you will want on ARM/AMD then too.
Correct it is what we want for ARM :).
We need to move up the crash logic , as similar as iommu_map_page() /
iommu_unmap_page().
- add the crash logic to iommu_iotlb_flush() / iommu_iotlb_flush_all().
- when IOMMU/MMU share page tables, we need to fix it one by one.
-- on amd, we need to add the crash logic to amd_iommu_flush_pages().
-- on intel, we need to add the crash logic to iommu_pte_flush().
-- on arm, we benefit that we add the crash logic to
iommu_iotlb_flush().
Right.
Taken together, we need to add crash logic to
iommu_iotlb_flush() / iommu_iotlb_flush_all() /
iommu_pte_flush() / amd_iommu_flush_pages().
For iommu_iotlb_* yes as it is common code. I don't know for the others.
Regards,
--
Julien Grall
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
http://lists.xen.org/xen-devel
