Hi Peng,
On 19/05/16 10:22, Peng Fan wrote:
CPU0 boots up secondary CPUs one by one. Before booting
one secondary CPU, CPU0 will assign hwid to smp_up_cpu
and flush cache. After the secondary CPU boots up,
NIT: s/the/a/
CPU0 will assign MPIDR_INVALID to smp_up_cpu and flush
cache.
There is no need for secondary CPUs to assign MPIDR_INVALID
to smp_up_cpu. So, drop it.
Signed-off-by: Peng Fan <van.free...@gmail.com>
Cc: Julien Grall <julien.gr...@arm.com>
Cc: Stefano Stabellini <sstabell...@kernel.org>
Reviewed-by: Julien Grall <julien.gr...@arm.com>
Regards,
---
xen/arch/arm/smpboot.c | 1 -
1 file changed, 1 deletion(-)
diff --git a/xen/arch/arm/smpboot.c b/xen/arch/arm/smpboot.c
index c5109bf..6b3c157 100644
--- a/xen/arch/arm/smpboot.c
+++ b/xen/arch/arm/smpboot.c
@@ -309,7 +309,6 @@ void start_secondary(unsigned long boot_phys_offset,
smp_wmb();
/* Now report this CPU is up */
- smp_up_cpu = MPIDR_INVALID;
cpumask_set_cpu(cpuid, &cpu_online_map);
smp_wmb();
--
Julien Grall
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