> @@ -2491,6 +2492,21 @@ bad_data_abort:
> > inject_dabt_exception(regs, info.gva, hsr.len);
> > }
> >
> > +static void do_trap_smc(struct cpu_user_regs *regs, const union hsr hsr)
> > +{
> > + int rc = 0;
> > + if ( current->domain->arch.monitor.privileged_call_enabled )
> > + {
> > + rc = monitor_smc(regs);
> > + }
>
>
> If you need to increment the patch version, maybe remove the curly
> braces here?
>
Sure.
>
> > diff --git a/xen/common/vm_event.c b/xen/common/vm_event.c
> > index 2906407..a29bda8 100644
> > --- a/xen/common/vm_event.c
> > +++ b/xen/common/vm_event.c
> > @@ -818,7 +818,6 @@ int vm_event_monitor_traps(struct vcpu *v, uint8_t
> sync,
> > req->altp2m_idx = altp2m_vcpu_idx(v);
> > }
> >
> > - vm_event_fill_regs(req);
> > vm_event_put_request(d, &d->vm_event->monitor, req);
> >
> > return 1;
>
> So now for x86 we only vm_fill_regs() for CR writes and breakpoints (and
> EPT faults, but that's in p2m.c which hasn't been touched by this
> patch)? That's a pretty big change, and one that's not explained in the
> patch description (which makes no mention of any x86 changes).
>
> Having that call in vm_event_monitor_traps() made sure that all
> vm_events get a copy of the respective registers. In the x86 case, that
> includes the guest request and MSR write events, which now no longer
> seem to carry that information, unless I'm missing something.
>
> That behaviour should not change for x86 events, please.
>
Yeap, good catch. It needs to be moved from the common path because the
inputs to the function will differ on ARM and x86. I'll double-check that
the x86 paths will remain functionally the same.
Tamas
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