Hi Jan, On 04/03/2016 10:16, Jan Beulich wrote:
On 04.03.16 at 07:15, <zhaoshengl...@huawei.com> wrote:
[...]
--- a/xen/include/public/hvm/params.h +++ b/xen/include/public/hvm/params.h @@ -55,6 +55,16 @@ * if this delivery method is available. */ +#define HVM_PARAM_CALLBACK_TYPE_EVENT 3 +/* + * val[55:16] need to be zero. + * val[15:8] is flag of event-channel interrupt: + * bit 8: interrupt is edge(1) or level(0) triggered + * bit 9: interrupt is active low(1) or high(0) + * val[7:0] is PPI number used by event-channel.
is a PPI
+ * This is only used by ARM/ARM64. + */
[...]
And then I'm now also wondering about the description of bits 8 and 9 - event channels don't know of edge/level triggering or high/low polarity, so it looks to me as if the comment is at least misleading too.
bit 8 and bit 9 are related to the PPI configuration. We need to know if the interrupt is level/edge trigger active low/high to configure correctly the interrupt controller.
What about renaming "interrupt" to "PPI" to make clear is related to the PPI?
Regards, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
