>>> On 09.03.16 at 09:09, <feng...@intel.com> wrote: >> >> +/* This mustn't modify registers other than %rax. */ >> >> +ENTRY(cr4_smep_smap_restore) >> >> + mov %cr4, %rax >> >> + test $X86_CR4_SMEP|X86_CR4_SMAP,%eax >> >> + jnz 0f > > If we clear every place where we are back to 32bit pv guest, > X86_CR4_SMEP and X86_CR4_SMAP bit should be clear > in CR4, right? If that is the case, we cannot jump to 0f.
I think Andrew's reply to (I think) a later mail of yours already answered this, but just in case: We unconditionally come here on paths that _may_ be used when entering Xen out of 32-bit PV guest context. I.e. we do not know which state the two flags are in. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
