On 23/02/16 11:18, Andrew Cooper wrote: > On 23/02/16 11:05, David Vrabel wrote: >> The hardware may not write the FIP/FDP fields with a XSAVE* >> instruction. e.g., with XSAVEOPT/XSAVES if the state hasn't changed >> or on AMD CPUs when a floating point exception is not pending. We >> need to identify this case so we can correctly apply the check for >> whether to save/restore FCS/FDS. >> >> By toggling FIP[63] we can turn the field into a non-canonical address >> and check for this value after the XSAVE instruction. >> >> This results in smaller code with fewer branches and is more >> understandable. >> >> Signed-off-by: David Vrabel <david.vra...@citrix.com> > > For consistently, the same change in detection logic should be applied > to fpu_fxsave()
I don't think it is necessary. fpu_fxsave() only needs to check for the AMD case, and the logic is already simple. David _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
