>>> On 17.02.16 at 14:06, <andrew.coop...@citrix.com> wrote: > On 17/02/16 09:02, Jan Beulich wrote: >>>>> On 08.02.16 at 18:26, <andrew.coop...@citrix.com> wrote: >> This fiddles with behavior on AMD only, yet it's not obvious why this >> couldn't be done in vendor independent code (it should, afaict, be >> benign for Intel). > > AMD and Intel levelling are fundamentally different. > > The former are override MSRs with some quirks when it comes to the magic > bits, while the latter are strict masks which take effect before the > magic bits are folded in.
That's what you've derived from observations aiui, not something written down somewhere. As long as the final effect is the same, I still think doing such adjustments in vendor independent code would be better. But I won't insist. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
