On 12/23/2015 12:21 AM, Tian, Kevin wrote:
From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
Sent: Wednesday, December 23, 2015 12:25 AM
Current Intel VPMU emulation needs to perform more checks when writing
PMU MSRs on guest's behalf:
* MSR_CORE_PERF_GLOBAL_CTRL is not checked at all
* MSR_CORE_PERF_FIXED_CTR_CTRL has more reserved bits in PMU version 2
* MSR_CORE_PERF_GLOBAL_OVF_CTRL's bit 61 is allowed on versions greater
* than 2.
We can also use precomputed mask in core2_vpmu_do_interrupt().
Signed-off-by: Boris Ostrovsky <boris.ostrov...@oracle.com>
Acked-by: Kevin Tian <kevin.t...@intel.com>
I think I missed one more register. Let me send another version.
-boris
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