>>> On 22.12.15 at 03:54, <huaitong....@intel.com> wrote:
> On Mon, 2015-12-21 at 08:07 -0700, Jan Beulich wrote:
>> > > > On 21.12.15 at 08:21, <huaitong....@intel.com> wrote:
>> > @@ -4600,6 +4600,14 @@ void hvm_cpuid(unsigned int input, unsigned
>> > int *eax, unsigned int *ebx,
>> >          /* Don't expose INVPCID to non-hap hvm. */
>> >          if ( (count == 0) && !hap_enabled(d) )
>> >              *ebx &= ~cpufeat_mask(X86_FEATURE_INVPCID);
>> > +
>> > +        /* X86_FEATURE_PKU is not yet implemented for shadow
>> > paging. */
>> > +        if ( (count == 0) && !hap_enabled(d) )
>> > +            *ecx &= ~cpufeat_mask(X86_FEATURE_PKU);
>> 
>> I'm still missing the xsave dependency here.
> Xsave dependency deletion becasue we use RDPKRU to get PKRU register
> value instead of XSAVE now.

What the hypervisor does doesn't matter here. The question is
whether from an architectural standpoint XSAVE is a prerequsite.
If it is, then you need to clear PKU when _guest_ XSAVE is clear.

Jan


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