> From: Kai Huang [mailto:kai.hu...@linux.intel.com] > Sent: Tuesday, October 20, 2015 10:35 AM > > Existing PML implementation turns on EPT A/D bit unconditionally if PML is > supported by hardware. This works but enabling of EPT A/D bit can be deferred > until PML get enabled. There's no point in enabling the extra feature for > every > domain when we're not meaning to use it (yet). > > Also added ASSERT of domain having been paused to ept_flush_pml_buffers to > make > it consistent with ept_enable{disable}_pml. > > Sanity live migration and GUI display were tested on Broadwell Machine. > > Signed-off-by: Kai Huang <kai.hu...@linux.intel.com> > Suggested-by: Jan Beulich <jbeul...@suse.com>
Acked-by: Kevin Tian <kevin.t...@intel.com> _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
