On 09/28/2015 06:51 AM, Andrew Cooper wrote:
On 28/09/15 08:13, Haozhong Zhang wrote:
This patchset adds support for VMX TSC scaling feature which is
available on Intel Skylake CPU. The specification of VMX TSC scaling
can be found at
http://www.intel.com/content/www/us/en/processors/timestamp-counter-scaling-virtualization-white-paper.html
VMX TSC scaling allows guest TSC which is read by guest rdtsc(p)
instructions increases in a rate that is customized by the hypervisor
and can be different than the host TSC rate. Basically, VMX TSC
scaling adds a 64-bit field called TSC multiplier in VMCS so that, if
VMX TSC scaling is enabled, TSC read by guest rdtsc(p) instructions
will be calculated by the following formula:
guest EDX:EAX = (Host TSC * TSC multiplier) >> 48 + VMX TSC Offset
where, Host TSC = Host MSR_IA32_TSC + Host MSR_IA32_TSC_ADJUST.
This patchset is composed of following four parts.
1. PATCH 01 - 02 fix bugs in tsc_get_info() which could result in
errors when VMX TSC scaling is used.
2. PATCH 03 - 09 add/move the common parts of VMX TSC scaling and
SVM TSC ratio to hvm.c and x86/time.c.
3. PATCH 10 - 12 implement the VMX-specific code for supporting VMX
TSC scaling.
4. PATCH 13 adapts libxl for VMX TSC scaling (as well as SVM TSC
ratio).
Thankyou for this series. I have had a brief look over it and it
appears to be in good shape, but have not done a thorough review yet.
Konrad/Boris: As Oracle are the main users of the more interesting guest
timing modes, do you have tests to verify correct functioning?
Not really. The most interesting thing to test here I think would be
migration between differently-clocked systems and we only do save/restore.
-boris
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