Hi Vijay,
On 31/08/2015 12:06, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K <vijaya.ku...@caviumnetworks.com>
Add support to read 32-bit access to GICR_TYPER register
Signed-off-by: Vijaya Kumar K <vijaya.ku...@caviumnetworks.com>
---
xen/arch/arm/vgic-v3.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/xen/arch/arm/vgic-v3.c b/xen/arch/arm/vgic-v3.c
index 771bfd1..4caac5e 100644
--- a/xen/arch/arm/vgic-v3.c
+++ b/xen/arch/arm/vgic-v3.c
@@ -122,6 +122,7 @@ static int __vgic_v3_rdistr_rd_mmio_read(struct vcpu *v,
mmio_info_t *info,
*r = vgic_reg32_read(GICV3_GICR_IIDR_VAL, info);
return 1;
case GICR_TYPER:
+ case GICR_TYPER + 4:
While I understand this...
{
uint64_t typer, aff;
@@ -136,7 +137,10 @@ static int __vgic_v3_rdistr_rd_mmio_read(struct vcpu *v,
mmio_info_t *info,
if ( v->arch.vgic.flags & VGIC_V3_RDIST_LAST )
typer |= GICR_TYPER_LAST;
- *r = vgic_reg64_read(typer, info);
+ if ( dabt.size == DABT_DOUBLE_WORD )
+ *r = vgic_reg64_read(typer, info);
+ else
+ *r = vgic_reg32_read(typer, info);
can you explain why this is necessary? The goal of vgic_reg64_read is to
handle all access size to 64bit register.
The vgic_reg32_read will only handle access on 32bit and therefore it
won't be possible to access to the most significant word.
Regards,
--
Julien Grall
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