>>> On 28.08.15 at 12:54, <shuai.r...@linux.intel.com> wrote: > On Wed, Aug 26, 2015 at 07:06:00AM -0600, Jan Beulich wrote: >> >>> On 25.08.15 at 12:54, <shuai.r...@linux.intel.com> wrote: >> >> > +++ b/xen/arch/x86/xstate.c >> > @@ -214,6 +214,11 @@ void xsave(struct vcpu *v, uint64_t mask) >> > typeof(ptr->fpu_sse.fip.sel) fcs = ptr->fpu_sse.fip.sel; >> > typeof(ptr->fpu_sse.fdp.sel) fds = ptr->fpu_sse.fdp.sel; >> > >> > + if ( cpu_has_xsaves ) >> > + asm volatile ( ".byte 0x48,0x0f,0xc7,0x2f" >> > + : "=m" (*ptr) >> > + : "a" (lmask), "d" (hmask), "D" (ptr) ); >> > + else >> > if ( cpu_has_xsaveopt ) >> >> Same question as above - why not also use XSAVEC when >> available? >> > In practice no real processor exists that only has one of the > xsavec/xsaves.
No today. And in any event - there are two feature flags, so both should be honored independently. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
