Hi,
On 27/07/2015 04:12, vijay.kil...@gmail.com wrote:
From: Vijaya Kumar K <vijaya.ku...@caviumnetworks.com>
ITS translation space contains GITS_TRANSLATOR register
s/GITS_TRANSLATOR/GITS_TRANSLATOR/
which is written by device to raise LPI. This space needs
to mapped to every domain address space for all physical
ITS available,so that device can access GITS_TRANSLATOR
Ditto
register using SMMU.
Marc pointed me today that if the processor is writing into
GITS_TRANSLATER it may be able to deadlock the system.
Reading more closely the spec (8.1.3 IHI0069A), there is undefined
behavior when writing to this register with wrong access size.
Currently the page table are shared between the processor and the SMMU,
so that means that a domain will be able to deadlock the processor and
therefore the whole platform.
So we should never expose GITS_TRANSLATER into the processor page table.
Which means unsharing some parts if not all of the page tables between
the processor and the SMMU.
While it's not required for this series, you don't support guest, this
would be mandatory to fix it before any usage of the vITS by a guest.
Regards,
--
Julien Grall
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