>>> On 12.06.15 at 11:40, <feng...@intel.com> wrote: >> -----Original Message----- >> From: Jan Beulich [mailto:jbeul...@suse.com] >> >>> On 08.05.15 at 11:07, <feng...@intel.com> wrote: >> > +static inline void setup_posted_irte( >> > + struct iremap_entry *new_ire, struct pi_desc *pi_desc, uint8_t gvec) >> > +{ >> > + new_ire->post.urg = 0; >> > + new_ire->post.vector = gvec; >> > + new_ire->post.pda_l = (((u64)virt_to_maddr(pi_desc)) >> >> > + (32 - PDA_LOW_BIT)) & PDA_MASK(LOW); >> > + new_ire->post.pda_h = (((u64)virt_to_maddr(pi_desc)) >> 32) & >> > + PDA_MASK(HIGH); >> >> Looking at this another time I can't see what the and-ing with >> PAD_MASK() is supposed to be good for. > > I cannot understand this well. Do you mean we don't need and PDA_MASK() > here?
Correct - the bitfield width (where the data gets stored into) already enforces the intended truncation afaict. Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
