>>> On 11.06.15 at 10:38, <kevin.t...@intel.com> wrote:
>>  From: Boris Ostrovsky [mailto:boris.ostrov...@oracle.com]
>> Sent: Wednesday, June 10, 2015 11:04 PM
>> 
>> Add support for handling PMU interrupts for PV(H) guests.
>> 
>> VPMU for the interrupted VCPU is unloaded until the guest issues 
> XENPMU_flush
>> hypercall. This allows the guest to access PMU MSR values that are stored in
>> VPMU context which is shared between hypervisor and domain, thus avoiding
>> traps to hypervisor.
>> 
>> Since the interrupt handler may now force VPMU context save (i.e. set
>> VPMU_CONTEXT_SAVE flag) we need to make changes to amd_vpmu_save() which
>> until now expected this flag to be set only when the counters were stopped.
>> 
>> Signed-off-by: Boris Ostrovsky <boris.ostrov...@oracle.com>
>> Acked-by: Daniel De Graaf <dgde...@tycho.nsa.gov>
> 
> I may need more time to understand the whole interrupt stuff for PV(H)
> guest. But regarding to VMX specific changes I think they are clear:
> 
> Signed-off-by: Kevin Tian <kevin.t...@intel.com>

I don't think you really meant S-o-b here?

Jan


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