Hi,
On 23/10/2017 18:55, Andrew Cooper wrote:
On 23/10/17 17:22, George Dunlap wrote:
On 09/11/2017 06:53 PM, Andrew Cooper wrote:
On 11/09/17 18:01, George Dunlap wrote:
+ Limit, x86 HVM: 128
+ Limit, ARM32: 8
+ Limit, ARM64: 128
+
+[XXX Andrew Cooper: Do want to add "Limit-Security" here for some of these?]
32 for each. 64 vcpu HVM guests can excerpt enough p2m lock pressure to
trigger a 5 second host watchdog timeout.
Is that "32 for x86 PV and x86 HVM", or "32 for x86 HVM and ARM64"? Or
something else?
The former. I'm not qualified to comment on any of the ARM limits.
That's a good question. On Arm32 the number of vCPUs is limited by the
GICv2 implementation.
On Arm64, GICv2 platform can only support up to 8 vCPUs. GICv3 is
theoretically 4096. But it is capped to 128 vCPUs, IIRC it was just to
match x86.
There are several non-trivial for_each_vcpu() loops in the domain_kill
path which aren't handled by continuations. ISTR 128 vcpus is enough to
trip a watchdog timeout when freeing pagetables.
On Arm, we have similar for_each_vcpu() in the vGIC code to inject SPIs
(see vgic_to_sgi). I haven't tried it so far with a high number of
vCPUs. So I am not sure if we should stick to 128 too. Stefano do you
have any opinions?
Cheers,
--
Julien Grall
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