>>> On 26.02.15 at 17:29, <roger....@citrix.com> wrote: > OK, I will try to take a look. All those faults come from physical > memory ranges that are supposed to be usable, and in fact the CPU seems > to be able to read/write from them without problems, or else the guest > would have crashed much more early. Regarding sharing the page tables > between EPT and the IOMMU, is there some bit that needs to be set in the > ept entry in order to mark a page as available by the IOMMU?
Bits 0 and 1 (read and write) are shared between VT-d and EPT (as is bit 7 - see struct dma_pte and ept_entry_t). Jan _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
