>>> Yi Sun <yi.y....@linux.intel.com> 07/06/17 4:07 AM >>>
>--- a/xen/arch/x86/psr.c
>+++ b/xen/arch/x86/psr.c
>@@ -373,12 +373,21 @@ static bool l3_cdp_get_feat_info(const struct feat_node
>*feat,
>return true;
>}
>
>+static void l3_cdp_write_msr(unsigned int cos, uint32_t val, enum cbm_type
>type)
>+{
>+ wrmsrl(((type == PSR_CBM_TYPE_L3_DATA) ?
>+ MSR_IA32_PSR_L3_MASK_DATA(cos) :
>+ MSR_IA32_PSR_L3_MASK_CODE(cos)),
>+ val);
>+}
>+
>static const struct feat_props l3_cdp_props = {
>.cos_num = 2,
>.type[0] = PSR_CBM_TYPE_L3_DATA,
>.type[1] = PSR_CBM_TYPE_L3_CODE,
>- .alt_type = FEAT_TYPE_L3_CAT,
>+ .alt_type = PSR_CBM_TYPE_L3,
I did wonder about the value set in the earlier patch, but if you change it here
this is a pretty clear sign that you really should set it to the intended value
right away. With this taken care of (or a good reason provided why it needs
to be the way it is)
Reviewed-by: Jan Beulich <jbeul...@suse.com>
Jan
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