On 17-07-07 12:37:28, Meng Xu wrote:
> > +  Sample cache capacity bitmasks for a bitlength of 8 are shown below. 
> > Please
> > +  note that all (and only) contiguous '1' combinations are allowed (e.g. 
> > FFFFH,
> > +  0FF0H, 003CH, etc.).
> 
> IIRC, the number of contiguous '1's in CBM should be at least 2 at
> least on my machine (Intel(R) Xeon(R) CPU E5-2618L v3).
> I'm unsure if this constraint exist for all CAT-capable processors.
> For those processors that have such constraint, the system may crash
> when the user sets only 1 bit to the CBM.
> 
It seems your machine does not officially support CAT. Per my info, some
machines, e.g. Haswell, do not officially support CAT but you can enable
CAT through some actions. On these machines, you may encounter such issue.

Per SDM, we do not have such limitation. Per my test on SKL, 1 bit setting
works well.

> 
> > +      - Member `dom_ids`
> > +
> > +        `dom_ids` is a bitmap, every bit corresponds to a domain. Index is
> > +        domain_id. It is used to help restore domain_id to 0 when a socket 
> > is
> > +        offline and then online again.
> 
> Did you mean "it is used to help restore domain_id to COS0, which has
> all 1s in CBM, when a socket is offline and then online again."
> 
Sorry, a typo here, should be:
"It is used to help restore 'd->arch.psr_cos_ids[socket]' to 0 when a socket is
offline and then online again."

If you think it is still not clear, I may add your explanation:
", which has all 1s in CBM, "

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