This patchset enables masking the reception of write_ctrlreg events depending on the value of certain bits in that register. The most representative example is filtering out events when the CR4.PGE bit is being flipped (global TLB flushes)
--- Changed since v2 * fix coding style * use ARRAY_SIZE and named indexes for x86 ctrl register resolution * add allignment padding for xen_domctl_monitor_op Changed since v3 * Fix index condition in get_x86_ctrl_reg_name _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org https://lists.xen.org/xen-devel
