The target CPU for an LPI is encoded in the interrupt translation table
entry, so can't be easily derived from just an LPI number (short of
walking *all* tables and find the matching LPI).
To avoid this in case we need to know the VCPU (for the INVALL command,
for instance), put the VCPU ID in the struct pending_irq, so that it is
easily accessible.
Signed-off-by: Andre Przywara <andre.przyw...@arm.com>
---
xen/include/asm-arm/vgic.h | 3 +++
1 file changed, 3 insertions(+)
diff --git a/xen/include/asm-arm/vgic.h b/xen/include/asm-arm/vgic.h
index 86a1a89..9145b42 100644
--- a/xen/include/asm-arm/vgic.h
+++ b/xen/include/asm-arm/vgic.h
@@ -88,6 +88,9 @@ struct pending_irq
* TODO: when implementing irq migration, taking only the current
* vgic lock is not going to be enough. */
struct list_head lr_queue;
+#ifdef CONFIG_HAS_ITS
+ uint16_t lpi_vcpu_id; /* The VCPU for an LPI. */
+#endif
};
#define NR_INTERRUPT_PER_RANK 32
--
2.9.0
_______________________________________________
Xen-devel mailing list
Xen-devel@lists.xen.org
https://lists.xen.org/xen-devel
