Hi Ard,
I did an implementation of BaseSynchronizationLib for ARM(32) a couple years
ago. I am not sure why I have never pushed this patch upstream.
Anyway, feel free to use it and push it upstream after reviewing it and adding
support for AArch64.
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.mar...@arm.com>
Thanks,
Olivier
________________________________________
From: Jordan Justen [jordan.l.jus...@intel.com]
Sent: 07 February 2015 22:00
To: Ard Biesheuvel; Kinney, Michael D
Cc: edk2-de...@lists.sourceforge.net; Laszlo Ersek; Olivier Martin; Roy Franz;
Leif Lindholm; Stefano Stabellini; ian.campb...@citrix.com; Anthony PERARD;
Christoffer Dall; xen-devel@lists.xen.org; Ilias Biris; Julien Grall
Subject: Re: [edk2] [PATCH v3 21/27] Ovmf/Xen: add ARM and AArch64 support to
XenBusDxe
On 2015-02-05 01:56:04, Ard Biesheuvel wrote:
> On 4 February 2015 at 21:10, Jordan Justen <jordan.l.jus...@intel.com> wrote:
> > On 2015-02-03 11:20:06, Ard Biesheuvel wrote:
> >> This patch adds support to XenBusDxe for executing on ARM and AArch64
> >> machines (the former only when built with GCC).
> >>
> >> Contributed-under: TianoCore Contribution Agreement 1.0
> >> Signed-off-by: Ard Biesheuvel <ard.biesheu...@linaro.org>
> >> ---
> >> OvmfPkg/XenBusDxe/AtomicsGcc.c | 44
> >> +++++++++++++++++++++++++++++++++++++++++
> >> OvmfPkg/XenBusDxe/XenBusDxe.inf | 3 +++
> >> 2 files changed, 47 insertions(+)
> >> create mode 100644 OvmfPkg/XenBusDxe/AtomicsGcc.c
> >>
> >> diff --git a/OvmfPkg/XenBusDxe/AtomicsGcc.c
> >> b/OvmfPkg/XenBusDxe/AtomicsGcc.c
> >> new file mode 100644
> >> index 000000000000..a0bdcbf67440
> >> --- /dev/null
> >> +++ b/OvmfPkg/XenBusDxe/AtomicsGcc.c
> >> @@ -0,0 +1,44 @@
> >> +/** @file
> >> + Arch-independent implementations of XenBusDxe atomics using GCC
> >> __builtins
> >> +
> >> + Copyright (C) 2014, Linaro Ltd.
> >> +
> >> + This program and the accompanying materials
> >> + are licensed and made available under the terms and conditions of the
> >> BSD License
> >> + which accompanies this distribution. The full text of the license may
> >> be found at
> >> + http://opensource.org/licenses/bsd-license.php
> >> +
> >> + THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
> >> + WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR
> >> IMPLIED.
> >> +
> >> +**/
> >> +
> >> +UINT16
> >> +EFIAPI
> >> +InternalSyncCompareExchange16 (
> >> + IN volatile UINT16 *Value,
> >> + IN UINT16 CompareValue,
> >> + IN UINT16 ExchangeValue
> >
> > Can you instead get InterlockedCompareExchange16 added to
> > BaseSynchronizationLib?
> >
> > http://permalink.gmane.org/gmane.comp.bios.tianocore.devel/10470
> >
>
> That would seem the obvious choice, but sadly, BaseSynchronizationLib
> is not implemented at all for ARM and AArch64 (Some .c files are there
> but they are just unsynchronized C implementations)
>
> So in order to do this properly, I would need to
> - implement the existing functions for ARM and AArch64
Would you? It appears the library is already used by ARM platforms as
is.
If you add your InterlockedCompareExchange16, it is at least an
improvement, right?
> - implement InterlockedCompareExchange16 () for all existing
> architectures, including IPF, which I don't have a clue about, and
> toolchains I don't have access to
Mike, you added the IPF InterlockedCompareExchange32.s and
InterlockedCompareExchange64.s files. Could you help to provide a
InterlockedCompareExchange16.s?
> - implement TestAndClearBit () for all architectures, or create a
> BaseBitopsLib and implement it there
I only meant to add InterlockedCompareExchange16 for now.
-Jordan
> I now understand how Anthony ended up doing it like this in the first place
> :-)
>
> Anyway, we are all invested in improving the code base, so I am happy
> to do my part, but I would need help from others to implement the
> pieces that are really not feasible for me to take on.
>
> --
> Ard.
>
> >> + )
> >> +{
> >> + return __sync_val_compare_and_swap_2 (Value, CompareValue,
> >> ExchangeValue);
> >> +}
> >> +
> >> +INT32
> >> +EFIAPI
> >> +TestAndClearBit (
> >> + IN INT32 Bit,
> >> + IN volatile VOID *Address
> >> + )
> >> +{
> >> + //
> >> + // Calculate the effective address relative to 'Address' based on the
> >> + // higher order bits of 'Bit'. Use signed shift instead of division to
> >> + // ensure we round towards -Inf, and end up with a positive shift in
> >> 'Bit',
> >> + // even if 'Bit' itself is negative.
> >> + //
> >> + Address += (Bit >> 5) * sizeof(INT32);
> >> + Bit &= 31;
> >> +
> >> + return (__sync_fetch_and_and_4 (Address, ~(1U << Bit)) & (1U << Bit))
> >> != 0;
> >> +}
> >> diff --git a/OvmfPkg/XenBusDxe/XenBusDxe.inf
> >> b/OvmfPkg/XenBusDxe/XenBusDxe.inf
> >> index 31553ac5a64a..949ec0a0c732 100644
> >> --- a/OvmfPkg/XenBusDxe/XenBusDxe.inf
> >> +++ b/OvmfPkg/XenBusDxe/XenBusDxe.inf
> >> @@ -54,6 +54,9 @@
> >> X64/InterlockedCompareExchange16.nasm
> >> X64/TestAndClearBit.nasm
> >>
> >> +[Sources.AARCH64, Sources.ARM]
> >> + AtomicsGcc.c | GCC
> >> +
> >> [LibraryClasses]
> >> UefiDriverEntryPoint
> >> UefiBootServicesTableLib
> >> --
> >> 1.8.3.2
> >>
> >>
> >> ------------------------------------------------------------------------------
> >> Dive into the World of Parallel Programming. The Go Parallel Website,
> >> sponsored by Intel and developed in partnership with Slashdot Media, is
> >> your
> >> hub for all things parallel software development, from weekly thought
> >> leadership blogs to news, videos, case studies, tutorials and more. Take a
> >> look and join the conversation now. http://goparallel.sourceforge.net/
> >> _______________________________________________
> >> edk2-devel mailing list
> >> edk2-de...@lists.sourceforge.net
> >> https://lists.sourceforge.net/lists/listinfo/edk2-devel
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Registered in England & Wales, Company No: 2548782From fd6d064aa07253183be812bcc80768ff7f1dcd71 Mon Sep 17 00:00:00 2001
From: Olivier Martin <olivier.mar...@arm.com>
Date: Mon, 18 Jun 2012 12:29:15 +0100
Subject: [PATCH] MdePkg/BaseSynchronizationLib: Added proper support for ARM
architecture
Contributed-under: TianoCore Contribution Agreement 1.0
Signed-off-by: Olivier Martin <olivier.mar...@arm.com>
---
.../BaseSynchronizationLib/Arm/Synchronization.S | 174 ++++++++++++++++++++
.../BaseSynchronizationLib/Arm/Synchronization.asm | 175 +++++++++++++++++++++
.../BaseSynchronizationLib/Arm/Synchronization.c | 115 --------------
.../BaseSynchronizationLib.inf | 3 +-
4 files changed, 351 insertions(+), 116 deletions(-)
create mode 100755 MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S
create mode 100755 MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm
delete mode 100644 MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c
mode change 100644 => 100755 MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S
new file mode 100755
index 0000000..1a95299
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.S
@@ -0,0 +1,174 @@
+// Implementation of synchronization functions for ARM architecture
+//
+// Copyright (c) 2012-2015, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+.text
+.align 3
+
+GCC_ASM_EXPORT(InternalSyncCompareExchange32)
+GCC_ASM_EXPORT(InternalSyncCompareExchange64)
+GCC_ASM_EXPORT(InternalSyncIncrement)
+GCC_ASM_EXPORT(InternalSyncDecrement)
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+//UINT32
+//EFIAPI
+//InternalSyncCompareExchange32 (
+// IN volatile UINT32 *Value,
+// IN UINT32 CompareValue,
+// IN UINT32 ExchangeValue
+// )
+ASM_PFX(InternalSyncCompareExchange32):
+ push { r4 }
+ ldrex r3, [r0]
+ cmp r3, r1
+ beq InternalSyncCompareExchange32Exchange
+ b InternalSyncCompareExchange32Fail
+
+InternalSyncCompareExchange32Exchange:
+ strex r4, r2, [r0]
+ cmp r4, #0
+ bne InternalSyncCompareExchange32Fail
+ dsb
+ mov r0, r1
+ pop { r4 }
+ bx lr
+
+InternalSyncCompareExchange32Fail:
+ mov r0, r3
+ pop { r4 }
+ bx lr
+
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+//UINT64
+//EFIAPI
+//InternalSyncCompareExchange64 (
+// IN volatile UINT64 *Value, // r0-r1
+// IN UINT64 CompareValue, // r2-r3
+// IN UINT64 ExchangeValue // r4-r5
+// )
+ASM_PFX(InternalSyncCompareExchange64):
+ push { r6-r8 }
+ ldrexd r6, r7, [r0]
+ cmp r6, r2
+ cmpeq r7, r3
+ bne InternalSyncCompareExchange64Fail
+ beq InternalSyncCompareExchange64Exchange
+
+InternalSyncCompareExchange64Exchange:
+ strexd r8, r4, r5, [r0]
+ cmp r8, #0
+ bne InternalSyncCompareExchange64Fail
+ mov r0, r2
+ mov r1, r3
+ dsb
+ pop { r6-r8 }
+ bx lr
+
+InternalSyncCompareExchange64Fail:
+ mov r0, r6
+ mov r1, r7
+ pop { r6-r8 }
+ bx lr
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+//UINT32
+//EFIAPI
+//InternalSyncIncrement (
+// IN volatile UINT32 *Value
+// )
+ASM_PFX(InternalSyncIncrement):
+ push { r1-r2 }
+TryInternalSyncIncrement:
+ ldrex r1, [r0]
+ add r1, r1, #1
+ strex r2, r1, [r0]
+ cmp r2, #0
+ bne TryInternalSyncIncrement
+ dsb
+ pop { r1-r2 }
+ bx lr
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decrement value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decrement value.
+
+**/
+//UINT32
+//EFIAPI
+//InternalSyncDecrement (
+// IN volatile UINT32 *Value
+// )
+ASM_PFX(InternalSyncDecrement):
+ push { r1-r2 }
+TryInternalSyncDecrement:
+ ldrex r1, [r0]
+ sub r1, r1, #1
+ strex r2, r1, [r0]
+ cmp r2, #0
+ bne TryInternalSyncDecrement
+ dsb
+ pop { r1-r2 }
+ bx lr
diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm
new file mode 100755
index 0000000..a0c7169
--- /dev/null
+++ b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.asm
@@ -0,0 +1,175 @@
+// Implementation of synchronization functions for ARM architecture
+//
+// Copyright (c) 2012-2015, ARM Limited. All rights reserved.
+//
+// This program and the accompanying materials
+// are licensed and made available under the terms and conditions of the BSD License
+// which accompanies this distribution. The full text of the license may be found at
+// http://opensource.org/licenses/bsd-license.php
+//
+// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
+// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
+//
+//
+
+ EXPORT InternalSyncCompareExchange32
+ EXPORT InternalSyncCompareExchange64
+ EXPORT InternalSyncIncrement
+ EXPORT InternalSyncDecrement
+
+ AREA ArmSynchronization, CODE, READONLY
+
+/**
+ Performs an atomic compare exchange operation on a 32-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 32-bit unsigned integer
+ specified by Value. If Value is equal to CompareValue, then Value is set to
+ ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
+ then Value is returned. The compare exchange operation must be performed using
+ MP safe mechanisms.
+
+ @param Value A pointer to the 32-bit value for the compare exchange
+ operation.
+ @param CompareValue 32-bit value used in compare operation.
+ @param ExchangeValue 32-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+//UINT32
+//EFIAPI
+//InternalSyncCompareExchange32 (
+// IN volatile UINT32 *Value,
+// IN UINT32 CompareValue,
+// IN UINT32 ExchangeValue
+// )
+InternalSyncCompareExchange32
+ push { r4 }
+ ldrex r3, [r0]
+ cmp r3, r1
+ beq InternalSyncCompareExchange32Exchange
+ b InternalSyncCompareExchange32Fail
+
+InternalSyncCompareExchange32Exchange
+ strex r4, r2, [r0]
+ cmp r4, #0
+ bne InternalSyncCompareExchange32Fail
+ dsb
+ mov r0, r1
+ pop { r4 }
+ bx lr
+
+InternalSyncCompareExchange32Fail
+ mov r0, r3
+ pop { r4 }
+ bx lr
+
+
+/**
+ Performs an atomic compare exchange operation on a 64-bit unsigned integer.
+
+ Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
+ by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
+ CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
+ The compare exchange operation must be performed using MP safe mechanisms.
+
+ @param Value A pointer to the 64-bit value for the compare exchange
+ operation.
+ @param CompareValue 64-bit value used in compare operation.
+ @param ExchangeValue 64-bit value used in exchange operation.
+
+ @return The original *Value before exchange.
+
+**/
+//UINT64
+//EFIAPI
+//InternalSyncCompareExchange64 (
+// IN volatile UINT64 *Value, // r0-r1
+// IN UINT64 CompareValue, // r2-r3
+// IN UINT64 ExchangeValue // r4-r5
+// )
+InternalSyncCompareExchange64
+ push { r6-r8 }
+ ldrexd r6, r7, [r0]
+ cmp r6, r2
+ cmpeq r7, r3
+ bne InternalSyncCompareExchange64Fail
+ beq InternalSyncCompareExchange64Exchange
+
+InternalSyncCompareExchange64Exchange
+ strexd r8, r4, r5, [r0]
+ cmp r8, #0
+ bne InternalSyncCompareExchange64Fail
+ mov r0, r2
+ mov r1, r3
+ dsb
+ pop { r6-r8 }
+ bx lr
+
+InternalSyncCompareExchange64Fail
+ mov r0, r6
+ mov r1, r7
+ pop { r6-r8 }
+ bx lr
+
+/**
+ Performs an atomic increment of an 32-bit unsigned integer.
+
+ Performs an atomic increment of the 32-bit unsigned integer specified by
+ Value and returns the incremented value. The increment operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to increment.
+
+ @return The incremented value.
+
+**/
+//UINT32
+//EFIAPI
+//InternalSyncIncrement (
+// IN volatile UINT32 *Value
+// )
+InternalSyncIncrement
+ push { r1-r2 }
+TryInternalSyncIncrement
+ ldrex r1, [r0]
+ add r1, r1, #1
+ strex r2, r1, [r0]
+ cmp r2, #0
+ bne TryInternalSyncIncrement
+ dsb
+ pop { r1-r2 }
+ bx lr
+
+/**
+ Performs an atomic decrement of an 32-bit unsigned integer.
+
+ Performs an atomic decrement of the 32-bit unsigned integer specified by
+ Value and returns the decrement value. The decrement operation must be
+ performed using MP safe mechanisms. The state of the return value is not
+ guaranteed to be MP safe.
+
+ @param Value A pointer to the 32-bit value to decrement.
+
+ @return The decrement value.
+
+**/
+//UINT32
+//EFIAPI
+//InternalSyncDecrement (
+// IN volatile UINT32 *Value
+// )
+InternalSyncDecrement
+ push { r1-r2 }
+TryInternalSyncDecrement
+ ldrex r1, [r0]
+ sub r1, r1, #1
+ strex r2, r1, [r0]
+ cmp r2, #0
+ bne TryInternalSyncDecrement
+ dsb
+ pop { r1-r2 }
+ bx lr
+
+ END
diff --git a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c b/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c
deleted file mode 100644
index 9ddaa09..0000000
--- a/MdePkg/Library/BaseSynchronizationLib/Arm/Synchronization.c
+++ /dev/null
@@ -1,115 +0,0 @@
-/** @file
- Implementation of synchronization functions. Still needs to be ported
-
- Copyright (c) 2006 - 2010, Intel Corporation. All rights reserved.<BR>
- Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>
- This program and the accompanying materials
- are licensed and made available under the terms and conditions of the BSD License
- which accompanies this distribution. The full text of the license may be found at
- http://opensource.org/licenses/bsd-license.php.
-
- THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,
- WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.
-
-**/
-
-/**
- Performs an atomic compare exchange operation on a 32-bit unsigned integer.
-
- Performs an atomic compare exchange operation on the 32-bit unsigned integer
- specified by Value. If Value is equal to CompareValue, then Value is set to
- ExchangeValue and CompareValue is returned. If Value is not equal to CompareValue,
- then Value is returned. The compare exchange operation must be performed using
- MP safe mechanisms.
-
- @param Value A pointer to the 32-bit value for the compare exchange
- operation.
- @param CompareValue 32-bit value used in compare operation.
- @param ExchangeValue 32-bit value used in exchange operation.
-
- @return The original *Value before exchange.
-
-**/
-UINT32
-EFIAPI
-InternalSyncCompareExchange32 (
- IN volatile UINT32 *Value,
- IN UINT32 CompareValue,
- IN UINT32 ExchangeValue
- )
-{
- return *Value != CompareValue ? *Value :
- ((*Value = ExchangeValue), CompareValue);
-}
-
-/**
- Performs an atomic compare exchange operation on a 64-bit unsigned integer.
-
- Performs an atomic compare exchange operation on the 64-bit unsigned integer specified
- by Value. If Value is equal to CompareValue, then Value is set to ExchangeValue and
- CompareValue is returned. If Value is not equal to CompareValue, then Value is returned.
- The compare exchange operation must be performed using MP safe mechanisms.
-
- @param Value A pointer to the 64-bit value for the compare exchange
- operation.
- @param CompareValue 64-bit value used in compare operation.
- @param ExchangeValue 64-bit value used in exchange operation.
-
- @return The original *Value before exchange.
-
-**/
-UINT64
-EFIAPI
-InternalSyncCompareExchange64 (
- IN volatile UINT64 *Value,
- IN UINT64 CompareValue,
- IN UINT64 ExchangeValue
- )
-{
- return *Value != CompareValue ? *Value :
- ((*Value = ExchangeValue), CompareValue);
-}
-
-/**
- Performs an atomic increment of an 32-bit unsigned integer.
-
- Performs an atomic increment of the 32-bit unsigned integer specified by
- Value and returns the incremented value. The increment operation must be
- performed using MP safe mechanisms. The state of the return value is not
- guaranteed to be MP safe.
-
- @param Value A pointer to the 32-bit value to increment.
-
- @return The incremented value.
-
-**/
-UINT32
-EFIAPI
-InternalSyncIncrement (
- IN volatile UINT32 *Value
- )
-{
- return ++*Value;
-}
-
-/**
- Performs an atomic decrement of an 32-bit unsigned integer.
-
- Performs an atomic decrement of the 32-bit unsigned integer specified by
- Value and returns the decrement value. The decrement operation must be
- performed using MP safe mechanisms. The state of the return value is not
- guaranteed to be MP safe.
-
- @param Value A pointer to the 32-bit value to decrement.
-
- @return The decrement value.
-
-**/
-UINT32
-EFIAPI
-InternalSyncDecrement (
- IN volatile UINT32 *Value
- )
-{
- return --*Value;
-}
diff --git a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
old mode 100644
new mode 100755
index bf9cf67..7a304b2
--- a/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
+++ b/MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf
@@ -78,7 +78,8 @@
[Sources.ARM]
Synchronization.c
- Arm/Synchronization.c
+ Arm/Synchronization.asm | RVCT
+ Arm/Synchronization.S | GCC
[Sources.AARCH64]
Synchronization.c
--
1.9.1
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