On Thu, Jan 22, 2015 at 11:20:15AM +0000, Jan Beulich wrote: > >>> On 21.01.15 at 12:19, <chao.p.p...@linux.intel.com> wrote: > > --- a/xen/arch/x86/platform_hypercall.c > > +++ b/xen/arch/x86/platform_hypercall.c > > @@ -61,7 +61,7 @@ long cpu_down_helper(void *data); > > long core_parking_helper(void *data); > > uint32_t get_cur_idle_nums(void); > > > > -#define RESOURCE_ACCESS_MAX_ENTRIES 2 > > +#define RESOURCE_ACCESS_MAX_ENTRIES 3 > > See my comment on an earlier version. The new added MSR_IA32_TSC and existed MSR_IA32_CMT_CTR should be read in an atomic unit. How to achieve this if not increase MAX_ENTRIES?
Chao > > > @@ -75,6 +75,7 @@ static bool_t allow_access_msr(unsigned int msr) > > /* MSR for CMT, refer to chapter 17.14 of Intel SDM. */ > > case MSR_IA32_CMT_EVTSEL: > > case MSR_IA32_CMT_CTR: > > + case MSR_IA32_TSC: > > return 1; > > } > > _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
