Hi Ian, On 14/01/15 12:42, Julien Grall wrote: > On 14/01/15 12:28, Ian Campbell wrote: >> On Tue, 2015-01-13 at 20:33 +0000, Julien Grall wrote: >>> On 13/01/15 15:55, Ian Campbell wrote: >>>> On Fri, 2014-12-12 at 14:43 +0000, Julien Grall wrote: >>>>> This help for guest interrupts debugging. If the vIRQ is not allocate, >>>>> this means that nothing is wired to it. >>>> >>>> Should we short circuit the rest of the enable operation for this IRQ >>>> then? i.e. implement such writes as ignored, e.g. not reflect it in >>>> reads of ISENABLER etc. >>>> >>>> What (if anything) does the GIC spec have to say on the subject? >>> >>> "A register bit corresponding to an unimplemented interrupt is RAZ/WI." >>> >>> The goal of this print was mostly for debugging physical IRQ routed to a >>> guest. >>> >>> I could extend to ignore write to any register that should be RAZ/WI for >>> this specific interrupt. >> >> Since those are the defined semantics I think that is the best thing to >> do. > > Ok. I will look at it to see how we can implement it.
So I looked to the code. It may need some rework to effectively implement most of registers bits RAZ/WI when the interrupt doesn't exist. As this series is required for the ACPI series, I suggest to defer this work in a follow-up series. Regards, -- Julien Grall _______________________________________________ Xen-devel mailing list Xen-devel@lists.xen.org http://lists.xen.org/xen-devel
