Title: [295416] trunk/Source/_javascript_Core/llint/LowLevelInterpreter.asm
- Revision
- 295416
- Author
- [email protected]
- Date
- 2022-06-09 04:30:45 -0700 (Thu, 09 Jun 2022)
Log Message
Don't save CSRs respected by the JIT ABI.
Patch by Geza Lore <[email protected]> on 2022-06-09
https://bugs.webkit.org/show_bug.cgi?id=241369
Reviewed by Mark Lam.
It is not necessary to save and restore CSRs respected by the JIT ABI on
VM entry/exit. The compiler will preserve them. (r10 and r11 on ARMv7.)
* Source/_javascript_Core/llint/LowLevelInterpreter.asm:
Canonical link: https://commits.webkit.org/251422@main
Modified Paths
Diff
Modified: trunk/Source/_javascript_Core/llint/LowLevelInterpreter.asm (295415 => 295416)
--- trunk/Source/_javascript_Core/llint/LowLevelInterpreter.asm 2022-06-09 10:39:48 UTC (rev 295415)
+++ trunk/Source/_javascript_Core/llint/LowLevelInterpreter.asm 2022-06-09 11:30:45 UTC (rev 295416)
@@ -756,7 +756,7 @@
if C_LOOP or C_LOOP_WIN or ARM64 or ARM64E or X86_64 or X86_64_WIN or RISCV64
const CalleeSaveRegisterCount = 0
elsif ARMv7
- const CalleeSaveRegisterCount = 7 + 2 * 1 // 7 32-bit GPRs + 1 64-bit FPR
+ const CalleeSaveRegisterCount = 5 + 2 * 1 // 5 32-bit GPRs + 1 64-bit FPR
elsif MIPS
const CalleeSaveRegisterCount = 3
elsif X86 or X86_WIN
@@ -770,10 +770,14 @@
const VMEntryTotalFrameSize = (CalleeRegisterSaveSize + sizeof VMEntryRecord + StackAlignment - 1) & ~StackAlignmentMask
macro pushCalleeSaves()
+ # Note: Only registers that are in RegisterSet::calleeSaveRegisters(),
+ # but are not in RegisterSet::vmCalleeSaveRegisters() need to be saved here,
+ # i.e.: only those registers that are callee save in the C ABI, but are not
+ # callee save in the JIT ABI.
if C_LOOP or C_LOOP_WIN or ARM64 or ARM64E or X86_64 or X86_64_WIN or RISCV64
elsif ARMv7
emit "vpush.64 {d15}"
- emit "push {r4-r6, r8-r11}"
+ emit "push {r4-r6, r8-r9}"
elsif MIPS
emit "addiu $sp, $sp, -12"
emit "sw $s0, 0($sp)" # csr0/metaData
@@ -795,7 +799,7 @@
macro popCalleeSaves()
if C_LOOP or C_LOOP_WIN or ARM64 or ARM64E or X86_64 or X86_64_WIN or RISCV64
elsif ARMv7
- emit "pop {r4-r6, r8-r11}"
+ emit "pop {r4-r6, r8-r9}"
emit "vpop.64 {d15}"
elsif MIPS
emit "lw $s0, 0($sp)"
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