I tried that, but > On Jul 22, 2020, at 1:07 AM, Benoit Ganne (bganne) via lists.fd.io > <bganne=cisco....@lists.fd.io> wrote: > > Hi Christian, > > Everything else being correct (VPP NUMA core placement vs NIC etc) and if you > see a bottleneck on IO, you might need to set the NIC as 'Preferred IO' in > the BIOS.
I tried setting that but didn't notice an issue, perhaps it's not an IO
bottleneck. All the IO is to a single PCIe gen3 100G connectx-5 card, in both
cases (although the aggregate bandwidth over 4 cores is no higher than 40G and
no higher than 10G per core).
Shuold I change the compiler options? The standard cpu flags seem to be:
set(CMAKE_C_FLAGS "-march=corei7 -mtune=corei7-avx ${CMAKE_C_FLAGS}")
with variants added to that. I think for Epyc the march/mtune can be set to
znver2, but I'm not sure how that plays with the avx2 and avx512 variants later
(avx2 is supported by epyc but not avx512). I tried creating a znver2 variant
but I think I'm missing something for that to actually work.
Thanks,
Chris.
>
> Best
> Ben
>
>> -----Original Message-----
>> From: vpp-dev@lists.fd.io <vpp-dev@lists.fd.io> On Behalf Of Christian
>> Hopps
>> Sent: mercredi 22 juillet 2020 02:34
>> To: vpp-dev <vpp-dev@lists.fd.io>
>> Cc: Christian Hopps <cho...@chopps.org>
>> Subject: [vpp-dev] AMD Epyc and vpp.
>>
>> Hi vpp-dev,
>>
>> Has anyone done performance analysis with the new AMD epyc processors and
>> VPP?
>>
>> Just naively running my normal build shows a 3GHz Epyc machine under-
>> performing a 2.1GHz intel xeon.
>>
>> Thanks,
>> Chris.
>
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