> From: Nicolin Chen <nicol...@nvidia.com>
> Sent: Friday, July 5, 2024 7:19 AM
>
> On Thu, Jul 04, 2024 at 03:32:32PM +0800, Baolu Lu wrote:
> > On 2024/7/4 14:37, Tian, Kevin wrote:
> > > > From: Nicolin Chen<nicol...@nvidia.com>
> > > > Sent: Thursday, July 4, 2024 1:36 PM
> > > >
> > > > On Thu, Jul 04, 2024 at 10:59:45AM +0800, Baolu Lu wrote:
> > > > > > On Tue, Jul 02, 2024 at 02:34:40PM +0800, Lu Baolu wrote:
> > > > > >
> > > > > > +enum iommu_fault_type {
> > > > > > + IOMMU_FAULT_TYPE_HWPT_IOPF,
> > > > > > + IOMMU_FAULT_TYPE_VIOMMU_IRQ,
> > > > > > +};
> > > > > >
> > > > > > struct iommu_fault_alloc {
> > > > > > __u32 size;
> > > > > > __u32 flags;
> > > > > > + __u32 type; /* enum iommu_fault_type */
> > > > > > __u32 out_fault_id;
> > > > > > __u32 out_fault_fd;
> > > and need a new reserved field for alignment.
>
> Hmm, what's the reason for enforcing a 64-bit alignment to an
> all-u32 struct though? I thought we need a reserved field only
> for padding. The struct iommu_ioas_alloc has three u32 members
> for example?
>
yeah please ignore this comment.
