Now that we have individual files, fix reported spelling errors. While at it, remove extra white space at end of line.
Signed-off-by: Parav Pandit <[email protected]> --- transport-mmio.tex | 12 ++++++------ 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/transport-mmio.tex b/transport-mmio.tex index 7f2e0c3..7f4cc15 100644 --- a/transport-mmio.tex +++ b/transport-mmio.tex @@ -18,7 +18,7 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi MMIO virtio devices provide a set of memory mapped control registers followed by a device-specific configuration space, -described in the table~\ref{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout}. +described in the table~\ref{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout}. All register values are organized as Little Endian. @@ -32,7 +32,7 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi \begin{longtable}{p{0.2\textwidth}p{0.7\textwidth}} \caption {MMIO Device Register Layout} - \label{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout} \\ + \label{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout} \\ \hline \mmioreg{Name}{Function}{Offset from base}{Direction}{Description} \hline @@ -272,13 +272,13 @@ \subsection{MMIO Device Register Layout}\label{sec:Virtio Transport Options / Vi \drivernormative{\subsubsection}{MMIO Device Register Layout}{Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout} The driver MUST NOT access memory locations not described in the -table \ref{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout} +table \ref{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout} (or, in case of the configuration space, described in the device specification), MUST NOT write to the read-only registers (direction R) and MUST NOT read from the write-only registers (direction W). The driver MUST only use 32 bit wide and aligned reads and writes to access the control registers -described in table \ref{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Register Layout}. +described in table \ref{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Register Layout}. For the device-specific configuration space, the driver MUST use 8 bit wide accesses for 8 bit wide fields, 16 bit wide and aligned accesses for 16 bit wide fields and 32 bit wide and aligned accesses for 32 and 64 bit wide fields. @@ -407,14 +407,14 @@ \subsection{Legacy interface}\label{sec:Virtio Transport Options / Virtio Over M in a slightly different control register layout, the device initialization and the virtual queue configuration procedure. -Table \ref{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Legacy Register Layout} +Table \ref{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Legacy Register Layout} presents control registers layout, omitting descriptions of registers which did not change their function nor behaviour: \begin{longtable}{p{0.2\textwidth}p{0.7\textwidth}} \caption {MMIO Device Legacy Register Layout} - \label{tab:Virtio Trasport Options / Virtio Over MMIO / MMIO Device Legacy Register Layout} \\ + \label{tab:Virtio Transport Options / Virtio Over MMIO / MMIO Device Legacy Register Layout} \\ \hline \mmioreg{Name}{Function}{Offset from base}{Direction}{Description} \hline -- 2.26.2 --------------------------------------------------------------------- To unsubscribe, e-mail: [email protected] For additional commands, e-mail: [email protected]
