Ah my bad. Just realized I was using my own copy of SeaBIOS that I had built. When I use the copy from qemu-3.0.0/pc-bios/bios-256k.bin I see the i915 driver finding the OpRegion: [ 0.269341] in i915_driver_init_hw [ 0.269374] [drm] Memory usable by graphics device = 4096M [ 0.269585] in intel_opregion_setup [ 0.269600] graphic opregion physical addr: 0x7fffe000
Still working on getting the screen to light up On Wed, May 29, 2019 at 9:44 AM Alex Williamson <alex.william...@redhat.com> wrote: > > On Wed, 29 May 2019 09:25:59 -0700 > Micah Morton <mort...@chromium.org> wrote: > > > So as I mentioned, the ChromeOS firmware writes the location of the > > OpRegion to the ASLS PCI config register > > (https://github.com/coreboot/coreboot/blob/master/src/drivers/intel/gma/opregion.c#L88). > > The i915 driver then gets the address for the OpRegion from that > > register here: > > https://elixir.bootlin.com/linux/latest/source/drivers/gpu/drm/i915/intel_opregion.c#L910. > > This all works for Chrome OS, but when we run a VM with SeaBIOS the > > ASLS PCI config register doesn't get written with the location of the > > OpRegion.: > > [ 0.263640] in i915_driver_init_hw (I added this) > > ... > > [ 0.263922] in intel_opregion_setup (and this) > > [ 0.263954] graphic opregion physical addr: 0x0 <-- This is > > supposed to point to the OpRegion, not be zero. > > [ 0.263954] ACPI OpRegion not supported! > > ... > > [ 0.267727] Failed to find VBIOS tables (VBT) > > > > I'm also not sure if the OpRegion is actually in VM memory or not. Do > > you think I need to find a way to put the OpRegion in VM memory as we > > have seen coreboot (Chrome OS firmware) do above? Or should using > > "x-igd-opregion=on" somehow ensure that the OpRegion makes it into VM > > memory? Clearly I at least need to find a way to set that ASLS PCI > > config register in the VM or modify the i915 driver that runs in the > > guest so it can find the OpRegion. > > In QEMU, vfio_pci_igd_opregion_init() adds the opregion to a fw_cfg > file "etc/igd-opregion" and makes the (virtual) ASLS register > writable. Then in SeaBIOS, any Intel vendor ID, PCI class VGA device > will trigger the intel_igd_setup() function, which looks for the fw_cfg > file, allocates space for it, and writes the GPA back to the ASLS > register. That's at least how it's supposed to work, which again > reminds me for the umpteenth time that x-igd-opregion only works with > SeaBIOS as OVMF has rejected this support in favor of an option ROM > based solution, which Intel never provided. I think you're using > SeaBIOS though so, so as long as that's not an ancient version it > should do the little dance here. The ASLS is writable though, we don't > do any write-once tricks, so something could blindly stomp on it. You > might enable logging in SeaBIOS, it will emit some spew for the > OpRegion support. You could also enable tracing to see the write of > the ASLS into QEMU. Thanks, > > Alex _______________________________________________ vfio-users mailing list vfio-users@redhat.com https://www.redhat.com/mailman/listinfo/vfio-users
