On Fri, 29 Mar 2019 10:52:10 +0800 (CST)
fulaiyang <fulaiy...@163.com> wrote:
> Hi Alex:
>
> In the 'vfio_pci_igd_host_init' func,we should stuff a few values
> into the host bridge such as BDSM、GMCH. And the resgister offset in
> the host bridge is defined in ‘the igd_host_bridge_infos’ structure.
> But I confuse that the offset is different from the 8th intel
> processor datasheet. I wonder if it is a problem?
Probably, Intel seems to arbitrarily redesign IGD with little thought
to backwards compatibility.
> qemu/hw/pci-host/piix.c
> static const IGDHostInfo igd_host_bridge_infos[] = {
> {0x08, 2}, /* revision id */
> {0x2c, 2}, /* sybsystem vendor id */
> {0x2e, 2}, /* sybsystem id */
> {0x50, 2}, /* SNB: processor graphics control register */
> {0x52, 2}, /* processor graphics control register */
> {0xa4, 4}, /* SNB: graphics base of stolen memory */
> {0xa8, 4}, /* SNB: base of GTT stolen memory */
> };
Note that this is not used for vfio IGD assignment, only for xen-based
IGD assignment, the igd_host_bridge_infos we use is:
hw/vfio/pci-quirks.c
static const IGDHostInfo igd_host_bridge_infos[] = {
{PCI_REVISION_ID, 2},
{PCI_SUBSYSTEM_VENDOR_ID, 2},
{PCI_SUBSYSTEM_ID, 2},
};
GMCH and BDSM are setup in vfio_probe_igd_bar4_quirk() and BDSM is
rewritten by the BIOS in vfio_igd_quirk_data_write() based on the
memory allocated at VM boot time.
Kabylake came out well after direct assignment support was added and
TBH, I don't have the time or interest to keep up with Intel's changing
hardware (patches welcome!). If you want to use something that Intel
somewhat tries to support, you might try GVT-g rather than direct
assignment. Thanks,
Alex
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