Hi Nate! I followed the guide in https://files.ettus.com/manual/md_usrp3_build_instructions.html, thus ended up with Vivado 2018.3 and then later found out this requires UHD 3.15. Thanks for pointing me to the Vivado bug. I thought with 2018.3.1 this would be fixed, but apparently that is not the case. Now I went back to 2018.3 (clean re-install) and installed the patch AR#71898. The standard N310 image compiles fine now.
The other error ERROR: [Synth 8-524] part-select [15:8] out of range of prefix 'STR_SINK_FIFOSIZE' [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:270] seems to be happening only for few specific RFNoC blocks (fosphor and split_stream, specifically). Leaving these out, the RFNoC image does compile. Not sure what exactly is the problem, though. The recent commit https://github.com/EttusResearch/fpga/commit/1102779f49d44c9e8b88ce7251d203eb62ae26c9 did not help (tried both versions, neither of them works). Regards Robert From: Nate Temple [mailto:nate.tem...@ettus.com] Sent: Monday, December 09, 2019 8:43 PM To: Pöhlmann, Robert Cc: USRP-users@lists.ettus.com Subject: Re: [USRP-users] Default RFNoC image for N310 does not compile Hi Robert, So this is a bug related to Vivado, you will need to install this linked below patch and it should resolve it. https://www.xilinx.com/support/answers/71898.html Regards, Nate Temple On Mon, Dec 9, 2019 at 10:38 AM Nate Temple <nate.tem...@ettus.com<mailto:nate.tem...@ettus.com>> wrote: Hi Robert, Thanks for the bug report. If you're just trying to use RFNoC at this point, I would recommend to stick with the latest stable release, which at this time is v3.14.1.1. Note, 3.14.x.x UHD will require Vivado 2017.4. Regards, Nate Temple On Mon, Dec 9, 2019 at 7:33 AM Robert via USRP-users <usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com>> wrote: Hi all! I tried to compile the default RFNoC image for the N310, using UHD on tag v3.15.0.0-rc2 and Xilinx Vivado 2018.3.1. Running "make N310_RFNOC_XG", the IP cores are compiled successfully, but then Vivado shows the following errors: ERROR: [Synth 8-524] part-select [15:8] out of range of prefix 'STR_SINK_FIFOSIZE' [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:270] ERROR: [Synth 8-521] parameter assignment could not be resolved to a constant [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:270] ERROR: [Synth 8-196] conditional expression could not be resolved to a constant [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:239] WARNING: [Synth 8-693] zero replication count - replication ignored [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:26] WARNING: [Synth 8-693] zero replication count - replication ignored [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:27] WARNING: [Synth 8-693] zero replication count - replication ignored [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:31] ERROR: [Synth 8-6156] failed synthesizing module 'noc_shell__parameterized9' [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_shell.v:21] ERROR: [Synth 8-6156] failed synthesizing module 'noc_block_fosphor' [/usr/local/src/uhd/fpga-src/usrp3/lib/rfnoc/noc_block_fosphor.v:8] ERROR: [Synth 8-6156] failed synthesizing module 'n3xx_core' [/usr/local/src/uhd/fpga-src/usrp3/top/n3xx/n3xx_core.v:17] ERROR: [Synth 8-6156] failed synthesizing module 'n3xx' [/usr/local/src/uhd/fpga-src/usrp3/top/n3xx/dboards/mg/n3xx.v:13] The full build.log file is attached. I did not modify any files, just trying to compile the RFNoC example as provided. Btw I also tried to build the default image with "make N310_XG", this one compiles but failed later during DRC: [DRC BIVC-1] Bank IO standard Vcc: Conflicting Vcc voltages in bank 34. For example, the following two ports in this bank have conflicting VCCOs: ddr3_ck_p[0] (DIFF_SSTL15, requiring VCCO=1.500) and ddr3_addr[15] (LVCMOS18, requiring VCCO=1.800) [Vivado_Tcl 4-23] Error(s) found during DRC. Placer not run. _______________________________________________ USRP-users mailing list USRP-users@lists.ettus.com<mailto:USRP-users@lists.ettus.com> http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com
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