Hi, Does the UHD Python API support reading any FPGA registers on the B205? Looking at this file as an exhaustive source of what python functions are available/implemented, nothing jumped at me (unless read_register allows that.)
https://github.com/EttusResearch/uhd/blob/46ab88b42a5e19bfbac45c5eff5a4ba3a0cfbd84/host/lib/usrp/multi_usrp_python.hpp The eventual goal is to be able to read-back a new/user-defined FPGA register - so I'm thinking if there is an existing implementation/support for reading any FPGA register (radio, top-level, whichever) in python, I can use that as a template. Thanks Chintan On Tue, Sep 4, 2018 at 1:15 PM Martin Braun <martin.br...@ettus.com> wrote: > On 09/03/2018 08:21 PM, Chintan Patel via USRP-users wrote: > > Hello, > > > > I have defined a new readback register in the FPGA in the b205_core > > file, adjacent to the lock state register. What is the least invasive > > function call/method in the UHD driver/software to be able to read this > > newly defined register? > > This is how the lock state reg is read: > > https://github.com/EttusResearch/uhd/blob/6013a511370b9452020adfc72d7893f1c3bb2963/host/lib/usrp/b200/b200_impl.cpp#L1325 > > ...and if you want to read your own readback regs on that address space, > you'll need to add code that does something similar. The easiest way is > to then bind that register to a property and you can read it out in your > own software. > > However, we recently added an even-less invasive way of accessing user > regs. However, they would have to live in the user_regs address space. > See the manual for more info: > > http://files.ettus.com/manual/page_usrp_b200.html#b200_customfpga > > -- M > > > > > > Thanks > > C > > > > > > _______________________________________________ > > USRP-users mailing list > > USRP-users@lists.ettus.com > > http://lists.ettus.com/mailman/listinfo/usrp-users_lists.ettus.com > > > >
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