Hi,
I am capturing 75 MHz using 100 MSps sample rate as well as using 200 MSps sample rate but I am not getting the near-end bands with 100 MSps while I am getting those with 200 MSps. What I have done is capture the data and then pass it through a polyphase channelizer to give me 200 K bandwidth channels and then I am upsampling that data to 1 MSps or 2 Msps and passing through gr-gsm receiver. With 200 MSps I am getting correct data whereas with 100 MSps I am not. But according to usrp specs my sampling rate as 1.25*75 MHz should be enough but that is not happening. Please help. Regards, Snehasish ________________________________ From: Derek Kozel <derek.ko...@ettus.com> Sent: Wednesday, August 23, 2017 12:15:11 PM To: Koyel Das Cc: Snehasish Kar; usrp-users@lists.ettus.com Subject: Re: [USRP-users] Support with setting usrp sampling rate to 150MSPS Hello Koyel, This is a fundamental problem that increasing sample rate takes more processing power to handle but provides more bandwidth of spectrum. How wide is the signal you need to process? The general recommendation is that you sample at 1.25 times your bandwidth. This provides 20% more spectrum than is necessary, but means that your signal is minimally affected by the digital filters used in the decimation in the FPGA. This is part of how the 160 MHz bandwidth of the UBX is derived from the 200 MHz sampling rate of an X310 (what is inside the 2954R). The default FPGA image is limited to integer decimation rates as described in the manual. http://files.ettus.com/manual/page_general.html#general_sampleratenotes GSM 1800 covers 170 MHz so even with the full sampling rate the outermost edges will be attenuated by both the analog filters and the digital filters. If you only want to look at the uplink or downlink individually then you can observe the 75 MHz bandwidth with 100 MS/s and easily meet the recommended maximum of 80% occupied bandwidth. For non-integer decimation rates such as 200e6/150e6 = 4/3 you would have to implement a rational resampler as a custom RFNoC block to support that decimation rate, certainly possible but additional work. Regards, Derek On Wed, Aug 23, 2017 at 7:17 AM, Koyel Das <koyel....@vehere.com<mailto:koyel....@vehere.com>> wrote: Hi, Many thanks for your reply. Yes 200 MSps works. But taking 200 MSps will increase the amount of data considerably and increase the processing time and very less amount of data is decoded from large amount of input samples compared to lower sampling frequencies. What is the solution to these problems? Regards, Koyel On Tue, Aug 22, 2017 at 9:14 PM, Snehasish Kar <snehasish....@live.com<mailto:snehasish....@live.com>> wrote: Ok I will try that. BR Snehasish On 22-Aug-2017, at 8:51 PM, Derek Kozel <derek.ko...@ettus.com<mailto:derek.ko...@ettus.com>> wrote: Try 200MS/s. The FPGA can only decimate integer amounts from the ADC rate, which is 200MS/s. On Tue, Aug 22, 2017 at 5:15 PM, Snehasish Kar via USRP-users <usrp-users@lists.ettus.com<mailto:usrp-users@lists.ettus.com>> wrote: Hello I am trying to receive gsm 1800 band using NI USRP 2954R, but when I am trying to set the sampling rate of uhd_source in gnuradio to 150 MSPS, it's giving an error message saying hardware does not support sampling rate above 100MSPS. Please help! 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