Please accept our apologies if you receive multiple copies of this CfP. Submission deadline is extended to February 8.
*************************************************************************************** * ALCHEMY Workshop 2016 * Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems * * Held in conjunction with the International Conference on Computational Science (ICCS 2016) * San Diego, CA, USA, 6-8 June 2016 * * http://sites.google.com/site/alchemyworkshop *************************************************************************************** The 4th workshop on Architecture, Languages, Compilation and Hardware support for Emerging ManYcore systems (ALCHEMY) is a unique encountering place between all domains of science around many-core system programming. Especially this is a place where traditional HPC scientists can encounter embedded-HPC scientists and vice-versa, to talk about issues and new solutions for programming many-cores. This is a good place to discuss about emerging targets (new many-core processors) or emerging solutions to program them or making the execution more efficient (through software or hardware features). Submission Deadline : February 8 Up to 10 pages Procedia CS format, or 2 pages for WiP and posters. Through Easychair: https://easychair.org/conferences/?conf=iccs20160 (select the ALCHEMY track) Full Call for Paper: Massively parallel processors have entered high performance computing architectures, as well as embedded systems. In this context, developers of parallel applications, including heavy simulations and scientific calculations will undoubtedly have to cope with many-core processors at the early design steps. In the past sessions of the Alchemy workshop, held together with the ICCS meeting, we have presented significant contributions on the design of many-core processors, both in the hardware and the software programming environment sides, as well as some industrial-grade application case studies. In this 2016 session, we seek academic and industrial works that contribute to the design and the programmability of many-core processors. Topics Topics include, but are not limited to: * Programming models and languages for many-cores * Compilers for programming languages * Runtime generation for parallel programming on manycores * Architecture support for massive parallelism management * Enhanced communications for CMP/manycores * Shared memory, data consistency models and protocols * New operating systems, or dedicated OS * Security, crypto systems for manycores * User feedback on existing manycore architectures (experiments with Adapteva Epiphany, Intel Phi, Kalray MPPA, ST STHorm, Tilera Gx, TSAR..etc) * Many-core integration within HPC systems (micro-servers) Submission: This year, there will be two formats for the presentation at the workshop. The usual full-length paper is 10 pages according to the ICCS format, and the short-paper format well fitted for works in progress, with a maximum of 2 pages. The accepted papers for full-length paper will be published alongside with the ICCS proceedings in Procedia Computer Science, whereas the short-papers will be presentation and poster only at the conference (with proceedings and presentations available from the workshop website). The manuscripts of up to 10 pages, written in English and formatted according to the EasyChair templates, should be submitted electronically. Site: https://easychair.org/conferences/?conf=iccs20160 Templates are available for download in the Easychair right-hand-side menu in a “New submission” mode. https://easychair.org/publications/procedia_word.docx https://easychair.org/publications/procedia_latex.zip Program Chair Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France Antoniu POP, University of Manchester, UK Program Committee: (to be extended) Jeronimo CASTRILLON, CFAED / TU Dresden, Germany Camille COTI, Université de Paris-Nord, France Loïc CUDENNEC, CEA, LIST, France Aleksandar DRAGOJEVIC, Microsoft Research Cambridge, UK Daniel ETIEMBLE, Université de Paris-Sud, France Vincent GRAMOLI, NICTA / University of Sydney, Australia Sven KAROL, TU Dresden, Germany Christos KARTSAKLIS, Oak Ridge National Laboratory, USA Michihiro KOIBUCHI, National Institute of Informatics, Japan Vianney LAPOTRE, Université de Bretagne-Sud, France Stéphane LOUISE, CEA, LIST, France Marco MATTAVELLI, École Polytechnique Fédérale de Lausanne (EPFL), Switzerland Maximilian ODENDAHL, Silexica / RWTH Aachen University, Germany Eric PETIT, Université de Versailles Saint Quentin-en-Yvelines, France Erwan PIRIOU, CEA, LIST, France Antoniu POP, University of Manchester, UK Jason RIEDY, Georgia Institute of Technology, USA Thomas ROPARS, LIG / Université de Grenoble 1, France Martha Johanna SEPULVEDA, Institute for Security in Information Technology, TU Munich, Germany Philippe THIERRY, Intel Corporation, France General Chair: Loïc CUDENNEC, CEA, LIST, France Stéphane LOUISE, CEA, LIST, France -- Loïc CUDENNEC http://www-list.cea.fr http://www.cudennec.fr/ CEA, LIST, Nano-INNOV / Saclay PC 172, 91191 Gif-sur-Yvette CEDEX +33 1 69 08 00 58
