FIG. 15e is a diagrammatic block diagram of a control register of FIG.
15d, in accordance with one embodiment. Control register 384(c) includes
a sub-buffer enable interrupt flag 384(c)(0), a stop flag 384(c)(1) and
a next segment pointer 384(c)(2). Sub-buffer enable interrupt flag
384(c)(0) typically serves a similar function as enable interrupt flag
382(f), except on the data segment level rather than the channel level.


...


Stop flag 384(c)(1) typically indicates whether the data segment pointed
to by data segment pointer 384 is the last data segment 150(n). When
stop flag 384(c)(1) is set DMA engine 372 will cease operations for the
particular DMA channel and the associated FIFO 306 after all the
contents of the particular data segment has been read and processed. If
stop flag 384(c)(1) is reset then DMA engine 372 may continue to the
next data segment in the sequence.


In theory, stop flag should be set at the last period 

how do the driver know which period is the last one?


https://git.kernel.org/cgit/linux/kernel/git/tiwai/sound.git/commit/sound/core?id=48d882978eb0a15547093b4542a82b5c22548041

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https://bugs.launchpad.net/bugs/1551041

Title:
  snd_au8820 0000:01:04.0: BUG: , pos = 16386, buffer size = 16384,
  period size = 1024

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