The MXC_*_UCTRL_*PM_BIT bits are available only on i.MX51.
Signed-off-by: Benoît Thébaudeau <benoit.thebaud...@advansee.com>
Cc: Marek Vasut <ma...@denx.de>
Cc: Stefano Babic <sba...@denx.de>
---
Changes for v2: None.
Changes for v3: None.
.../drivers/usb/host/ehci-mx5.c | 7 ++++++-
1 file changed, 6 insertions(+), 1 deletion(-)
diff --git u-boot-usb-76454b2.orig/drivers/usb/host/ehci-mx5.c
u-boot-usb-76454b2/drivers/usb/host/ehci-mx5.c
index 8c1b70a..4f4b98a 100644
--- u-boot-usb-76454b2.orig/drivers/usb/host/ehci-mx5.c
+++ u-boot-usb-76454b2/drivers/usb/host/ehci-mx5.c
@@ -160,10 +160,12 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
MXC_USB_PHY_CTR_FUNC_OFFSET);
v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET);
+#ifdef CONFIG_MX51
if (flags & MXC_EHCI_POWER_PINS_ENABLED)
v &= ~MXC_OTG_UCTRL_OPM_BIT;
else
v |= MXC_OTG_UCTRL_OPM_BIT;
+#endif
__raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);
}
break;
@@ -177,10 +179,12 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
#endif
v = __raw_readl(usbother_base + MXC_USBCTRL_OFFSET);
+#ifdef CONFIG_MX51
if (flags & MXC_EHCI_POWER_PINS_ENABLED)
v &= ~MXC_H1_UCTRL_H1PM_BIT; /* H1 power mask unused */
else
v |= MXC_H1_UCTRL_H1PM_BIT; /* H1 power mask used */
+#endif
__raw_writel(v, usbother_base + MXC_USBCTRL_OFFSET);
v = __raw_readl(usbother_base + MXC_USB_PHY_CTR_FUNC_OFFSET);
@@ -193,11 +197,12 @@ int mxc_set_usbcontrol(int port, unsigned int flags)
break;
case 2: /* Host 2 ULPI */
v = __raw_readl(usbother_base + MXC_USBH2CTRL_OFFSET);
+#ifdef CONFIG_MX51
if (flags & MXC_EHCI_POWER_PINS_ENABLED)
v &= ~MXC_H2_UCTRL_H2PM_BIT; /* H2 power mask unused */
else
v |= MXC_H2_UCTRL_H2PM_BIT; /* H2 power mask used */
-
+#endif
__raw_writel(v, usbother_base + MXC_USBH2CTRL_OFFSET);
break;
}
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