On 05/11/2012 21:07, Benoît Thébaudeau wrote: > The mx5 lowlevel_init.S contains board-specific code based on the reference > design. Let's keep it since it avoids creating new lowlevel_init files and it > may be used by many boards. But add a config to make it optional in order not > to > cause issues on boards not following this part of the reference design.
Right, and it is correct that this initialisation is not done for all boards. Acked-by: Stefano Babic <sba...@denx.de> Best regards, Stefano Babic > > Signed-off-by: Benoît Thébaudeau <benoit.thebaud...@advansee.com> > Cc: Stefano Babic <sba...@denx.de> > Cc: Matt Sealey <m...@genesi-usa.com> > --- > Note for mx51_efikamx and vision2 board maintainers: Check if > CONFIG_SYS_MAIN_PWR_ON should be defined or not for your hardware (I don't > have > your schematics). Anyway, this patch does not change the behavior for these > boards, but it allows to fix a possible existing issue for these boards if > they differ from the mx51evk on this point. > > This patch supersedes http://patchwork.ozlabs.org/patch/177296/ . > Changes for v2: > - Rebase after other patch dropped in the original series (changes section > number in doc/README.imx5). > - Rebase after efikamx renamed to mx51_efikamx. > > .../arch/arm/cpu/armv7/mx5/lowlevel_init.S | 2 +- > {u-boot-imx-bad05afe.orig => u-boot-imx-bad05afe}/doc/README.imx5 | 5 > +++++ > .../include/configs/mx51_efikamx.h | 1 + > .../include/configs/mx51evk.h | 1 + > .../include/configs/vision2.h | 1 + > 5 files changed, 9 insertions(+), 1 deletion(-) > > diff --git u-boot-imx-bad05afe.orig/arch/arm/cpu/armv7/mx5/lowlevel_init.S > u-boot-imx-bad05afe/arch/arm/cpu/armv7/mx5/lowlevel_init.S > index 29ec957..6d9396a 100644 > --- u-boot-imx-bad05afe.orig/arch/arm/cpu/armv7/mx5/lowlevel_init.S > +++ u-boot-imx-bad05afe/arch/arm/cpu/armv7/mx5/lowlevel_init.S > @@ -396,7 +396,7 @@ ENTRY(lowlevel_init) > mov r10, lr > mov r4, #0 /* Fix R4 to 0 */ > > -#if defined(CONFIG_MX51) > +#if defined(CONFIG_SYS_MAIN_PWR_ON) > ldr r0, =GPIO1_BASE_ADDR > ldr r1, [r0, #0x0] > orr r1, r1, #1 << 23 > diff --git u-boot-imx-bad05afe.orig/doc/README.imx5 > u-boot-imx-bad05afe/doc/README.imx5 > index f7eab7d..e08941e 100644 > --- u-boot-imx-bad05afe.orig/doc/README.imx5 > +++ u-boot-imx-bad05afe/doc/README.imx5 > @@ -15,3 +15,8 @@ i.MX5x SoCs. > mode), which causes the effect of this failure to be much lower (in terms > of frequency deviation), avoiding system failure, or at least decreasing > the likelihood of system failure. > + > +1.2 CONFIG_SYS_MAIN_PWR_ON: Trigger MAIN_PWR_ON upon startup. > + This option should be enabled for boards having a SYS_ON_OFF_CTL signal > + connected to GPIO1[23] and triggering the MAIN_PWR_ON signal like in the > + reference designs. > diff --git u-boot-imx-bad05afe.orig/include/configs/mx51_efikamx.h > u-boot-imx-bad05afe/include/configs/mx51_efikamx.h > index ffe771f..a056566 100644 > --- u-boot-imx-bad05afe.orig/include/configs/mx51_efikamx.h > +++ u-boot-imx-bad05afe/include/configs/mx51_efikamx.h > @@ -261,5 +261,6 @@ > > #define CONFIG_SYS_DDR_CLKSEL 0 > #define CONFIG_SYS_CLKTL_CBCDR 0x59E35145 > +#define CONFIG_SYS_MAIN_PWR_ON > > #endif > diff --git u-boot-imx-bad05afe.orig/include/configs/mx51evk.h > u-boot-imx-bad05afe/include/configs/mx51evk.h > index 8cf59fe..122871f 100644 > --- u-boot-imx-bad05afe.orig/include/configs/mx51evk.h > +++ u-boot-imx-bad05afe/include/configs/mx51evk.h > @@ -235,6 +235,7 @@ > > #define CONFIG_SYS_DDR_CLKSEL 0 > #define CONFIG_SYS_CLKTL_CBCDR 0x59E35100 > +#define CONFIG_SYS_MAIN_PWR_ON > > /*----------------------------------------------------------------------- > * FLASH and environment organization > diff --git u-boot-imx-bad05afe.orig/include/configs/vision2.h > u-boot-imx-bad05afe/include/configs/vision2.h > index 848df88..13c5702 100644 > --- u-boot-imx-bad05afe.orig/include/configs/vision2.h > +++ u-boot-imx-bad05afe/include/configs/vision2.h > @@ -196,6 +196,7 @@ > /* 166 MHz DDR RAM */ > #define CONFIG_SYS_DDR_CLKSEL 0 > #define CONFIG_SYS_CLKTL_CBCDR 0x19239100 > +#define CONFIG_SYS_MAIN_PWR_ON > > #define CONFIG_SYS_NO_FLASH > > -- ===================================================================== DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de ===================================================================== _______________________________________________ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot